Electronic repeater servo

Claim 2

An electronic system responsive to first sine and cosine information signals at a first frequency and representing a first angular position comprising: a first oscillator for developing a first oscillator signal; first switching means, coupled to said first oscillator, being responsive to the first oscillator signal for developing quadrature first and second reference signals; first demodulating means, coupled to said first switching means and coupled to receive the first information signals, for demodulating the first sine and cosine information signals in order to respectively develop first and second demodulated signals; and first control means, coupled between said first demodulating means and said first oscillator, being responsive to the first and second demodulated signals for controlling the frequency and phase of the first oscillator signal such that the quadrature first and second reference signals from said first switching means are at the first frequency and have respective phase angles related to the first angular position.

Claim 3

The system of claim 1 further including: first means coupled to said first demodulating means for converting the first angular position into the first sine and cosine information signals at the first frequency.

Claim 4

The system of claim 1 wherein said first control means comprises: a summing circuit coupled to said first demodulating means for summing the first and second demodulated signals to develop a first error signal; and filter circuit means coupled between said summing circuit and said first oscillator for developing a first control signal as a function of the first error signal to control the frequency and phase of the first oscillator signal.

Claim 5

The system of claim 3 wherein said first switching means comprises: a first flip-flop circuit coupled to said first oscillator for counting down the first oscillator signal to develop first and second complementary signals; and second and third flip-flop circuits coupled to said first flip-flop circuit for respectively developing the quadrature first and second reference signals in response to the respective application of the first and second complementary signals theReto.

Claim 6

The system of claim 4 wherein said first demodulating means comprises: a first demodulator coupled between said second flip-flop circuit and said summing circuit for developing the first demodulated signal in response to the first sine information signal and first reference signal; and a second demodulator coupled between said third flip-flop circuit and said summing circuit for developing the second demodulated signal in response to the first cosine information signal and second reference signal.

Claim 7

The system of claim 5 wherein said first oscillator is a voltage controlled oscillator responsive to the first control signal for causing the quadrature first and second reference signals from said second and third flip-flop circuits to be at the first frequency and have respective phase angles related to the first angular position when the first error signal is nulled.

Claim 8

The system of claim 6 further including: first means coupled to said first and second demodulators for converting the first angular position into the first sine and cosine information signals at the first frequency.

Claim 9

The system of claim 1 further including: first resolution means coupled to said first switching means, said first resolution means including second means for receiving first and second input signals to be resolved from a first to a second two-coordinate system, said first resolution means being responsive to the quadrature first and second reference signals from said first switching means for resolving the first and second input signals into first and second resolved signals in the second two-coordinate system.

Claim 10

The system of claim 8 wherein said first resolution means comprises: first resolver demodulation means, coupled to said first switching means, being selectively responsive to the first and second input signals and the first and second reference signals for developing first, second, third and fourth component signals; and first summing means coupled to said first resolver demodulation means for selectively summing the first, second, third and fourth component signals to provide the first and second resolved signals.

Claim 11

The system of claim 9 wherein said first control means comprises: second summing means coupled to said first demodulating means for summing the first and second demodulated signals to develop a first error signal; and filter circuit means coupled between said second summing means and said first oscillator for developing a first control signal as a function of the first error signal to control the frequency and phase of the first oscillator signal.

Claim 12

The system of claim 10 wherein said first switching means comprises: a first flip-flop circuit coupled to said first oscillator for counting down the first oscillator signal to develop first and second complementary signals; and second and third flip-flop circuits coupled to said first flip-flop circuit for respectively developing the quadrature first and second reference signals in response to the respective application of the first and second complementary signals thereto.

Claim 13

The system of claim 11 wherein said first demodulating means comprises: a first demodulator coupled between said second flip-flop circuit and said second summing means for developing the first demodulated signal in response to the first sine information signal and first reference signal; and a second demodulator coupled between said third flip-flop circuit and said second summing means for developing the second demodulated signal in response to the first cosine information signal and second reference signal.

Claim 14

The system of claim 12 wherein said first oscillator is a voltage controlled oscillator responsive to the first control signal for causing the quadrature first and second reference signals from said second and third flip-flop circuits to be at the first frequency and have respective phase angles related to the first angular positioN when the first error signal is nulled.

Claim 15

The system of claim 13 wherein said first resolver demodulation means comprises: a third demodulator, coupled to said second flip-flop circuit, being responsive to the first input signal and the first reference signal for developing the first component signal; a fourth demodulator, coupled to said third flip-flop circuit, being responsive to the second input signal and the second reference signal for developing the second component signal; a fifth demodulator, coupled to said third flip-flop circuit, being responsive to the first input signal and the second reference signal for developing the third component signal; and a sixth demodulator, coupled to said second flip-flop circuit, being responsive to the second input signal and the first reference signal for developing the fourth component signal.

Claim 16

The system of claim 14 wherein said first summing means comprises: a first amplifier coupled to said first and second demodulators for developing the first resolved signal; and a second amplifier coupled to said third and fourth demodulators for developing the second resolved signal.

Claim 17

The system of claim 15 further including: first means coupled to said first demodulating means for converting the first angular position into the first sine and cosine information signals at the first frequency.

Claim 18

The system of claim 1 further including: a second oscillator for developing a second oscillator signal; second switching means, coupled to said second oscillator, being responsive to the second oscillator signal for developing quadrature third and fourth reference signals; second demodulating means, coupled to said second switching means and adapted to receive at a first frequency second sine and cosine information signals representing a second angular position, for demodulating the second sine and cosine information signals in order to respectively develop third and fourth demodulated signals; second control means, coupled between said second demodulating means and said second oscillator, being responsive to the third and fourth demodulated signals for controlling the frequency and phase of the second oscillator signal such that the quadrature third and fourth reference signals from said second switching means are at the first frequency and have respective phase angles related to the second angular position; first resolution means, coupled to said first switching means and adapted to receive first and second input signals to be resolved from a first to a second three-coordinate system, for resolving the first and second input signals into a first resolved signal in the second three-coordinate system and for developing a combined signal; second means coupled to said first resolution means for remodulating the combined signal to develop a remodulated combined signal at the first frequency; and second resolution means, coupled to said second means and said second switching means and adapted to receive a third input signal to be resolved from the first to the second three-coordinate system, for resolving the third input signal and the remodulated combined signal into second and third resolved signals in the second three-coordinate system.

Claim 19

A resolving system comprising: a first phase-locking loop responsive to first sine and cosine information signals modulated at a first frequency and representing a first angular position for developing first and second quadrature signals electrically representing the first angular position; first demodulating means, coupled to said first phase-locking loop, being selectively responsive to the first and second quadrature signals and to first and second input signals to be resolved from a first to a second system of rectangular coordinates for developing demodulated first, second, third and fourth component signals; and first summing means coupled to said first demodulating means for selectivEly summing the first, second, third and fourth component signals to provide first and second resolved output signals.

Claim 20

A resolving system comprising: a first phase-locking loop responsive to first sine and cosine information signals modulated at a first frequency and representing a first angular position for developing first and second quadrature signals electrically representing the first angular position; first demodulating means, coupled to said first phase-locking loop, being selectively responsive to the first and second quadrature signals and to first and second input signals to be resolved from a first to a second system of rectangular coordinates for developing demodulated first, second, third and fourth component signals; and first summing means coupled to said first demodulating means for selectivEly summing the first, second, third and fourth component signals to provide first and second resolved output signals.

Claim 21

The resolving system of claim 18 further including: a second phase-locking loop responsive to second sine and cosine information signals modulated at the first frequency and representing a second angular position for developing third and fourth quadrature signals electrically representing the second angular position; modulating means, coupled to said first summing means, being responsive to said second resolved output signal for remodulating the second resolved output signal with the first frequency; second demodulating means, coupled to said modulating means and said second phase-locking loop, being selectively responsive to third and fourth quadrature signals and to a third input signal to be resolved from the first to the second system of rectangular coordinates for developing demodulated fifth, sixth, seventh and eighth component signals; and second summing means coupled to said second demodulating means for selectively summing the fifth, sixth, seventh and eighth component signals to provide third and fourth resolved output signals, the first, third and fourth resolved output signals representing the coordinates in the second system of rectangular coordinates of the first, second and third input signals, respectively.