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US3668561A Expired / Lapsed US ⏱️ 0.0 years remaining

Field effect transistor modulator circuit

Assignee: RCA Corp
•
Filing: 1970-06-29
•
Granted: 1972-06-06
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Expires: 1990-06-29
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Abstract

Abstract A modulator circuit employing two dual gate field effect transistors. A carrier signal is applied to one gate of each transistor in a push-pull arrangement. A modulating signal is applied to the other gate of each transistor in parallel. The modulated output signal appears between the drains of the transistors.

Inventors

  • 👤 John Eugene Krupa
  • 👤 Mario Robert Paglee

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 05:24
CPC Classifications
H; H03; H03C; H03C1/00; H03C1/36

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 296 words
A modulator circuit comprising: a first and second field effect transistor each having a first gate electrode, a second gate electrode, a drain electrode and a source electrode, the source electrodes of said transistors being connected together at a point of reference potential; a first biasing means connected to the drain electrode of each transistor; a second biasing means, including a source of potential and a variable resistor, connected to the second gate electrode of each transistor for providing substantially linear resistive operation of each transistor; a first transformer having a primary and a secondary winding, one end of the secondary winding of said first transformer being connected to the first gate electrode of the first transistor, the other end of the secondary winding of said first transformer being connected to the first gate electrode of the second transistor, one end of the primary winding of the first transformer being connected to said point of reference potential; means for applying a first signal between the ends of the primary winding of said first transformer; means including a capacitor for simultaneously coupling a second signal to the second gate electrode of each device; a second transformer having a primary and a secondary winding, one end of the secondary winding of said second transformer being connected to said point of reference potential; means including a first coupling capacitor for connecting one end of the primary winding of said second transformer to the drain electrode of said first transistor; means including a second coupling capacitor for connecting the other end of the primary winding of said second transformer to the drain electrode of said second transistor; and a pair of output terminals connected to the ends of the secondaRy winding of the second transformer for providing an output signal.
Claim 2
Dependent Claim 296 words
A modulator circuit comprising: a first and second field effect transistor each having a first gate electrode, a second gate electrode, a drain electrode and a source electrode, the source electrodes of said transistors being connected together at a point of reference potential; a first biasing means connected to the drain electrode of each transistor; a second biasing means, including a source of potential and a variable resistor, connected to the second gate electrode of each transistor for providing substantially linear resistive operation of each transistor; a first transformer having a primary and a secondary winding, one end of the secondary winding of said first transformer being connected to the first gate electrode of the first transistor, the other end of the secondary winding of said first transformer being connected to the first gate electrode of the second transistor, one end of the primary winding of the first transformer being connected to said point of reference potential; means for applying a first signal between the ends of the primary winding of said first transformer; means including a capacitor for simultaneously coupling a second signal to the second gate electrode of each device; a second transformer having a primary and a secondary winding, one end of the secondary winding of said second transformer being connected to said point of reference potential; means including a first coupling capacitor for connecting one end of the primary winding of said second transformer to the drain electrode of said first transistor; means including a second coupling capacitor for connecting the other end of the primary winding of said second transformer to the drain electrode of said second transistor; and a pair of output terminals connected to the ends of the secondaRy winding of the second transformer for providing an output signal.
Claim 3
Dependent Claim 18 words
The modulator circuit according to claim 1 wherein said first and said second transistors are substantially similar devices.
Claim 4
Dependent Claim 37 words
The modulator circuit according to claim 1 wherein said second signal is symmetrical and wherein said second biasing means is adjusted to bias said transistors in substantially the center of their respective linear resistive regions of operation.
Claim 5
Dependent Claim 41 words
The modulator circuit according to claim 1 wherein said second signal is a chain of positive going pulses and said second biasing means is adjusted to bias said transistors at substantially one end of their respective linear resistive regions of operation.

References Cited (Backward Citations)

US3371290A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-06-06 1975-12-06 1976-06-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-06-06 1979-12-06 1980-06-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-06-06 1983-12-06 1984-06-06 $7700.00 Window Closed / Lapsed

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