US3667064A
Expired / Lapsed
US
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Power semiconductor device with negative thermal feedback
Assignee: Massachusetts Institute of Technology
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Filing: 1969-05-19
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Granted: 1972-05-30
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Expires: 1989-05-19
Abstract
Abstract A composite power semiconductor is disclosed which is adapted to avoid second breakdown and therefore provide stable operation. The composite semiconductor consists of an array of parallelconnected integrated circuits constructed in a single chip, each circuit comprising an output power device, for connection between an electric power source and a load, and one or more associated low-level control amplifiers. The effect of the thermal instability called second breakdown in such an array is to channel a disproportionate amount of electric current through the output device undergoing second breakdown, thereby increasing the temperature of the affected output device, thereby increasing the current, etc. until failure occurs. In the power semiconductor disclosed, the output power device and associated low-level amplifier are thermally closely coupled so that each is at all times substantially at the temperature of the other or bears a predetermined temperature relationship therewith, and the two are interconnected in a fashion that will produce high electrical gain. There is negative thermal feedback so that a change in power dissipation with resulting temperature change in the output device causes the low-level amplifier to alter the electric current carried by the output device. For example, an increase in temperature which will tend to cause the output device to conduct a larger amount of electric current and which will also tend to cause the low-level amplifier to conduct a larger amount of current, can have the result, because of the close thermal coupling and interconnection, of maintaining the output current substantially constant.
Inventors
- 👤 Richard D Thornton
- 👤 John M Borky
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 01:58
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/565; G05F1/567; H; H03; H03F; H03F1/00; H03F1/30; H03F1/302; H03F1/52; H03K; H03K17/00; H03K17/14; H10; H10D; H10D84/00; H10D84/60; H10D84/641; H10D84/642; H10D89/00; H10D89/10; H10D89/105
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
167 words
A stable composite power semiconductor comprising an array of parallel-connected integrated circuits each integrated circuit having an output power device and an associated low-level amplifier having an input and an output, the output of the lowlevel amplifier being connected to the control terminals of the output power device, at least a portion of the low-level amplifier being in close enough proximity to the power device to provide good thermal coupling therebetween, the output power device and the associated low-level amplifier being interconnected to produce high electrical gain, the thermal coupling producing negative feedback so that a change in power dissipation in the output device causes a change in the low-level amplifier which acts to alter the electric current carried by the output device, the semiconductor being made in the form of a chip in which the critical thermal path between the output power device and its associated low-level amplifier is shorter than the thermal path through the chip between the output power device and a heat sink.
Claim 2
Dependent Claim
167 words
A stable composite power semiconductor comprising an array of parallel-connected integrated circuits each integrated circuit having an output power device and an associated low-level amplifier having an input and an output, the output of the lowlevel amplifier being connected to the control terminals of the output power device, at least a portion of the low-level amplifier being in close enough proximity to the power device to provide good thermal coupling therebetween, the output power device and the associated low-level amplifier being interconnected to produce high electrical gain, the thermal coupling producing negative feedback so that a change in power dissipation in the output device causes a change in the low-level amplifier which acts to alter the electric current carried by the output device, the semiconductor being made in the form of a chip in which the critical thermal path between the output power device and its associated low-level amplifier is shorter than the thermal path through the chip between the output power device and a heat sink.
Claim 3
Dependent Claim
45 words
A power semiconductor as claimed in claim 1 in the form of a single chip having a thickness of about 10 mils and in which the thermal path between the output power device and its associated low-level amplifier is the order of a few mils.
Claim 4
Dependent Claim
54 words
A power semiconductor as claimed in claim 1 in which the electric current being carried by the output device is conducted by heat sinks constituting major elements of the package of the device, the heat sinks providing the terminals through which a load current passes into and out of each of the output devices.
Claim 5
Dependent Claim
37 words
A power semiconductor as claimed in claim 1 in which the power device is a semiconductor controlled rectifier and the associated low-level amplifier comprises a transistor connected between the gate and the cathode electrodes of the rectifier.
Claim 6
Dependent Claim
30 words
A power semiconductor as claimed in claim 1 in which the power device is a semiconductor controlled rectifier and the low-level amplifier comprises a transistor and a resistance in combination.
Claim 7
Dependent Claim
32 words
A power semiconductor as claimed in claim 1 in which the power device is an output transistor and the associated low-level amplifier is a control transistor and a bias resistance in combination.
Claim 8
Dependent Claim
56 words
A composite semiconductor as claimed in claim 6 in which the collector of each control transistor is connected to the base of the associated power transistor and the emitters of both the output transistor and the associated control transistor are connected in common, base biasing current being supplied to the outPut transistor through the bias resistance.
Claim 9
Dependent Claim
39 words
A composite power semiconductor as claimed in claim 7 in which each control transistor is disposed within and surrounded by the associated output transistor thereby to effect close thermal coupling of the output transistor and the associated control transistor.
Claim 10
Dependent Claim
54 words
A composite power semiconductor as claimed in claim 8 in which the region of power dissipation in the power transistor is the base-to-collector junction and the thermal feedback path is between said junction and the base of the associated control transistor, the average length of said path being the order of a few mils.
Claim 11
Dependent Claim
33 words
A composite power semiconductor as claimed in claim 8 comprising an output transistor and a plurality of associated control transistors, the control transistors being disposed within and surrounded by the associated output transistor.
Claim 12
Dependent Claim
284 words
A semiconductor device comprising an integrated circuit including an output device and an associated low-level amplifier having an input and an output, the output of the low-level amplifier being connected to the control terminals of the output device, both the output device and the associated low-level amplifier having electric current characteristics that are altered by temperature variations, at least a portion of the low-level amplifier being in close enough proximity to the output device that the temperature of the output power device is at all times substantially equal to the temperature of the associated low-level amplifier, the output device and the associated low-level amplifier being interconnected to produce high electrical gain, the thermal coupling producing negative feedback so that a change in power dissipation and hence in temperature in the output device causes a change in the low-level amplifier which acts through said interconnection to alter the electric current carried by the output device in a manner to prevent thermal instability in the output device, said output device being an output transistor and said low-level amplifier being a control transistor and a bias resistance in combination, the collector and emitter of the control transistor being connected respectively to the base and emitter of the output transistor, the control transistor being disposed within and surrounded by the associated output transistor thereby to effect close thermal coupling of the output transistor to the associated control transistor, the region of power dissipation in the power transistor being the base-to-collector junction and said thermal feedback path being between said junction and the base of the associated control transistor, the length of said path being shorter than the length of the path through the semiconductor to a heat sink.
Claim 13
Dependent Claim
284 words
A semiconductor device comprising an integrated circuit including an output device and an associated low-level amplifier having an input and an output, the output of the low-level amplifier being connected to the control terminals of the output device, both the output device and the associated low-level amplifier having electric current characteristics that are altered by temperature variations, at least a portion of the low-level amplifier being in close enough proximity to the output device that the temperature of the output power device is at all times substantially equal to the temperature of the associated low-level amplifier, the output device and the associated low-level amplifier being interconnected to produce high electrical gain, the thermal coupling producing negative feedback so that a change in power dissipation and hence in temperature in the output device causes a change in the low-level amplifier which acts through said interconnection to alter the electric current carried by the output device in a manner to prevent thermal instability in the output device, said output device being an output transistor and said low-level amplifier being a control transistor and a bias resistance in combination, the collector and emitter of the control transistor being connected respectively to the base and emitter of the output transistor, the control transistor being disposed within and surrounded by the associated output transistor thereby to effect close thermal coupling of the output transistor to the associated control transistor, the region of power dissipation in the power transistor being the base-to-collector junction and said thermal feedback path being between said junction and the base of the associated control transistor, the length of said path being shorter than the length of the path through the semiconductor to a heat sink.
Claim 14
Dependent Claim
41 words
A semiconductor as claimed in claim 11 in which the average length of the path between said junction and the base of the associated control transistor is no greater than one-half the average distance to the heat sink from said junction.
Claim 15
Independent Claim
202 words
A method of fabricating a composite semiconductor comprising an array of parallel-connected integrated circuits each having an output power device and an associated low-level amplifier, both the output device and the associated low-level amplifier having electric current characteristics that are altered by temperature variations, said semiconductor being adapted to be self-protecting against second breakdown, that comprises: fabricating said semiconductor in the form of a chip in which the critical thermal path between the output power device and its associated low-level amplifier is shorter than the thermal path through the chip between the output device and a heat sink, thereby to place the low-level amplifier in close enough proximity to the output device to insure that the temperature of the output device is at all times substantially equal to the temperature of the associated low-level amplifier, and interconnecting the output device and the associated low-level amplifier to produce high electrical gain, therMal coupling producing negative feedback so that a change in power dissipation and hence in temperature in the output device causes a change in the low-level amplifier which acts through said interconnection to alter the electric current carried by the output device in order to prevent thermal instability in the output device.
Claim 16
Independent Claim
202 words
A method of fabricating a composite semiconductor comprising an array of parallel-connected integrated circuits each having an output power device and an associated low-level amplifier, both the output device and the associated low-level amplifier having electric current characteristics that are altered by temperature variations, said semiconductor being adapted to be self-protecting against second breakdown, that comprises: fabricating said semiconductor in the form of a chip in which the critical thermal path between the output power device and its associated low-level amplifier is shorter than the thermal path through the chip between the output device and a heat sink, thereby to place the low-level amplifier in close enough proximity to the output device to insure that the temperature of the output device is at all times substantially equal to the temperature of the associated low-level amplifier, and interconnecting the output device and the associated low-level amplifier to produce high electrical gain, therMal coupling producing negative feedback so that a change in power dissipation and hence in temperature in the output device causes a change in the low-level amplifier which acts through said interconnection to alter the electric current carried by the output device in order to prevent thermal instability in the output device.
Claim 17
Dependent Claim
65 words
A method as claimed in claim 13 that includes disposing the control portions of said associated amplifier substantially within and surrounded by said output device and maintaining the average length of the path between the power dissipation region of the power device and said control portions at a length no greater than one-half the average distance to the heat sink from said power dissipation region.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-05-30 | 1975-11-29 | 1976-05-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-05-30 | 1979-11-29 | 1980-05-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-05-30 | 1983-11-29 | 1984-05-30 | $7700.00 | Window Closed / Lapsed |