Balanced angle modulation detector

Claim 2

An angle modulation detection circuit comprising: switching means having at least a reference signal input electrode, a quadrature signal input electrode and an output electrode; means including at least a first input terminal for supplying angle modulated signals; means providing a first angle modulation signal transmission circuit between said first input terminal and said reference signal input electrode; means providing a second angle modulation signal transmission circuit between said first input terminal and said quadrature signal input electrode; said first angle modulation signal transmission circuit including a first limiting amplifier having an undesired characteristic of phase delay variation as a function of input signal amplitude and said second angle modulation signal transmission circuit including a second limiting amplifier similar to said first and having a substantially equal phase delay characteristic; further phase shifting means included in one of said first and second angle modulation signal transmission circuits for shifting the phase of said angle modulated signals conveyed therethrough such that, at a reference frequency, a substantially quadrature relationship is maintained between the signals from said first and second angle modulation signal transmission circuIts as viewed from said output electrode for a range of signal amplitudes applied to said input terminal; and a load circuit coupled to said output electrode.

Claim 3

An angle modulation detector circuit according to claim 1 wherein one of said means providing an angle modulation signal transmission circuit comprises a first and second transistor arranged as a differential limiting amplifier and each having emitter, base, and collector electrodes, one of said collector electrodes being coupled to said reference signal input electrode of said switching means, one of said base electrodes being coupled to said first input terminal, said emitter electrodes being coupled together and constant current means coupled to said emitter electrodes for providing a constant current to said first and second transistors.

Claim 4

An angle modulation detector circuit according to claim 1 wherein said switching means comprises at least a first and second transistor having emitter, base, and collector electrodes, wherein said emitter and base electrodes correspond to said reference and quadrature signal input electrodes respectively, and said collector electrode corresponds to said output electrode.

Claim 5

An angle modulation detector circuit according to claim 3 wherein said means providing a second angle modulation signal transmission circuit comprises, at least a third and fourth transistor having base, emitter, and collector electrodes, said base electrode of said third transistor being coupled to said first input terminal; means coupling the collector electrode of said third transistor to the emitter electrode of said fourth transistor for providing an impedance characteristic substantially equal to the impedance characteristic coupled between said reference electrode and said first input terminal.

Claim 6

An angle modulation detector circuit according to claim 1 wherein said further phase shifting means comprises a network including a resistor and first inductor connected in series coupled to a capacitor and second inductor connected in parallel.

Claim 7

An angle modulation detector circuit according to claim 5 wherein said first and second angle modulation signal transmission circuits each comprise differential amplifier means for limiting said angle modulated signals.

Claim 8

An angle modulation detector circuit according to claim 1 wherein said switching means comprises at least four switching transistors and each of said first and second angle modulated signal transmission circuits includes at least two transistors arranged as a differential amplifier.

Claim 9

An angle modulation detector circuit according to claim 7 wherein said four transistors in said switching means are arranged in two differential pairs and a collector of one transistor in a first differential amplifier is connected to joined emitter electrodes of transistors in one of said pairs while a collector of the other transistor in said first differential amplifier is connected to joined emitter electrodes of transistors in the other of said pairs.

Claim 10

A balanced angle modulation detector circuit according to claim 8 wherein said further phase shifting means comprises a tuned network having a resistor and inductor connected in series coupled to an inductor and capacitor connected in parallel.

Claim 11

An angle modulation detector circuit according to claim 8 wherein said second differential amplifier includes a further transistor coupled in cascode between said second differential amplifier and said quadrature signal input of said switching means.

Claim 12

An angle modulation detector circuit according to claim 10 wherein said quadrature signal input of said switching means comprises a base electrode of at least one of said four switching transistors and said reference signal input is connected to at least the collector of one of said differential limiter transistors.

Claim 13

A balanced angle modulation detector circuit comprising: a. a differential limiter circuit including first and second transistors each having base, emitter, and collector electrodes, said emitter electrodes being coupled to each other; b. means for applying differentially related angle modulated input signals between the base electrodes of said first and second transistors; c. means for applying a constant current between said emitters of said first and second transistors and a first terminal; d. third, fourth, fifth, and sixth transistors each having base, emitter, and collector electrodes; e. means coupling the collector electrodes of said third and sixth transistors to an operating potential supply terminal for providing the first half of a balanced detector load; f. means coupling the collector electrode of said fourth and fifth transistors to said operating potential supply terminal for providing the second half of said balanced detector load; g. means for coupling the collector electrode of said first transistor to the junction of said emitters of said third and fourth transistors; h. means for coupling the collector electrode of said second transistor to the junction of said emitters of said fifth and sixth transistors; i. an auxiliary differential limiter circuit including seventh and eighth transistors each having base, emitter, and collector electrodes; j. means for applying said differentially related angle modulated input signal between the base electrodes of said seventh and eighth transistors; k. means for applying said constant current means between the junction of said emitters of said seventh and eighth transistors and said first terminal;

Claim 14

A balanced angle modulation detector circuit comprising: a. a differential limiter circuit including first and second transistors each having base, emitter, and collector electrodes, said emitter electrodes being coupled to each other; b. means for applying differentially related angle modulated input signals between the base electrodes of said first and second transistors; c. means for applying a constant current between said emitters of said first and second transistors and a first terminal; d. third, fourth, fifth, and sixth transistors each having base, emitter, and collector electrodes; e. means coupling the collector electrodes of said third and sixth transistors to an operating potential supply terminal for providing the first half of a balanced detector load; f. means coupling the collector electrode of said fourth and fifth transistors to said operating potential supply terminal for providing the second half of said balanced detector load; g. means for coupling the collector electrode of said first transistor to the junction of said emitters of said third and fourth transistors; h. means for coupling the collector electrode of said second transistor to the junction of said emitters of said fifth and sixth transistors; i. an auxiliary differential limiter circuit including seventh and eighth transistors each having base, emitter, and collector electrodes; j. means for applying said differentially related angle modulated input signal between the base electrodes of said seventh and eighth transistors; k. means for applying said constant current means between the junction of said emitters of said seventh and eighth transistors and said first terminal;

Claim 15

A balanced angle modulation detector circuit according to claim 12 wherein all of said components except said series inductor, said parallel inductor and capacitor are incorporated in a monolithic integrated circuit chip.