US3666970A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Limiter circuit
Assignee: GTE Sylvania Inc
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Filing: 1971-03-15
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Granted: 1972-05-30
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Expires: 1991-03-15
Abstract
Abstract A limiter circuit employing a high gain differential voltage comparator. A positive quiescent voltage is established on the inverting input of the comparator at which input signals are applied. The output of the comparator is coupled to the noninverting input through a feedback arrangement so as to establish a threshold voltage which is positive with respect to the quiescent voltage until the input signal exceeds the positive threshold voltage and the output of the comparator changes from a high to a low level. Then the feedback arrangement establishes a threshold voltage which is negative with respect to the quiescent voltage until the input signal exceeds the negative threshold voltage and the output of the comparator changes from the low to the high level. Thus, a square-wave output is produced at the output of the comparator.
Inventors
- 👤 Matthew C Abbott
- 👤 Albert H Ashley
- 👤 Kenneth A Garrigus
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 13:43
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/25; G01; G01R; G01R19/00; G01R19/165; G01R19/16566; G01R19/16576; G01R19/1658; H; H03; H03K; H03K5/00; H03K5/01; H03K5/08
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
622 words
A limiter circuit including in combination a differential amplifier having first and second input terminals and an output terminal, said differential amplifier being operable to produce a first output condition at the output terminal in response to a voltage differential of one polarity between the first and second input terminals, and being operable to produce a second output condition at the output terminal in response to a voltage differential of the opposite polarity between the first and second input terminals; a signal input terminal; quiescent voltage means connected to the input signal terminal and to the second input terminal of the differential amplifier for providing a quiescent voltage at said terminal; reference voltage means connected to the first input terminal of the differential amplifier and the output terminal of the differential amplifier and operable to produce a first reference voltage at the first input terminal when the first output condition is present at the output terminal of the differential amplifier and operable to produce a second reference voltage at the first input terminal when the second output condition is present at the output terminal of the differential amplifier; said first reference voltage being of the one polarity with respect to the quiescent voltage and said second reference voltage being of the opposite polarity with respect to the quiescent voltage; whereby when an increasing voltage of the one polarity at the signal input terminal causes the voltage at the second input terminal of the differential amplifier to exceed said first reference voltage, the second output condition is produced at the output terminal of the differential amplifier; and when an increasing voltage of the opposite polarity at the signal input terminal causes the voltage at the second input terminal of the differential amplifier to exceed said second reference voltage, the first output condition is produced at the output of the differential amplifier; wherein said reference voltage means includes a first source of reference potential of the one polarity; a first resistance having one terminal connected to said first source of reference potential; a second source of reference potential of the opposite polarity with respect to said first source of reference potential; a second resistance having one terminal connected to said second source of reference potential and the other terminal connected to the first input terminal of the differential amplifier; a first diode connected between the other terminal of the first resistance and the other terminal of the second resistance, the first diode being arranged to permit current flow between the first source and the second source of reference potential; a second diode connected between the other terminal of the first resistance and the output terminal of the differential amplifier, the second diode being arranged to permit current flow between the first source of reference potential and the output terminal of the differential amplifier when the second output condition is present at the output terminal of the differential amplifier; the presence of the first output condition at the output terminal of the differential amplifier causing current to flow between the first and second source of reference potential through the first and second resistances, the current flow through the first resistance reverse biasing the second diode and current flow through the second resistance establishing said first reference voltage at the first input terminal of the differential amplifier; and the presence of the second output condition at the output terminal of the differential amplifier causing current to flow between the first source of reference potential and the output terminal throuGh the first resistance, current flow through the first resistance reverse biasing the first diode and causing the second source of reference potential to establish the second reference voltage at the first input terminal of the differential amplifier.
Claim 2
Dependent Claim
622 words
A limiter circuit including in combination a differential amplifier having first and second input terminals and an output terminal, said differential amplifier being operable to produce a first output condition at the output terminal in response to a voltage differential of one polarity between the first and second input terminals, and being operable to produce a second output condition at the output terminal in response to a voltage differential of the opposite polarity between the first and second input terminals; a signal input terminal; quiescent voltage means connected to the input signal terminal and to the second input terminal of the differential amplifier for providing a quiescent voltage at said terminal; reference voltage means connected to the first input terminal of the differential amplifier and the output terminal of the differential amplifier and operable to produce a first reference voltage at the first input terminal when the first output condition is present at the output terminal of the differential amplifier and operable to produce a second reference voltage at the first input terminal when the second output condition is present at the output terminal of the differential amplifier; said first reference voltage being of the one polarity with respect to the quiescent voltage and said second reference voltage being of the opposite polarity with respect to the quiescent voltage; whereby when an increasing voltage of the one polarity at the signal input terminal causes the voltage at the second input terminal of the differential amplifier to exceed said first reference voltage, the second output condition is produced at the output terminal of the differential amplifier; and when an increasing voltage of the opposite polarity at the signal input terminal causes the voltage at the second input terminal of the differential amplifier to exceed said second reference voltage, the first output condition is produced at the output of the differential amplifier; wherein said reference voltage means includes a first source of reference potential of the one polarity; a first resistance having one terminal connected to said first source of reference potential; a second source of reference potential of the opposite polarity with respect to said first source of reference potential; a second resistance having one terminal connected to said second source of reference potential and the other terminal connected to the first input terminal of the differential amplifier; a first diode connected between the other terminal of the first resistance and the other terminal of the second resistance, the first diode being arranged to permit current flow between the first source and the second source of reference potential; a second diode connected between the other terminal of the first resistance and the output terminal of the differential amplifier, the second diode being arranged to permit current flow between the first source of reference potential and the output terminal of the differential amplifier when the second output condition is present at the output terminal of the differential amplifier; the presence of the first output condition at the output terminal of the differential amplifier causing current to flow between the first and second source of reference potential through the first and second resistances, the current flow through the first resistance reverse biasing the second diode and current flow through the second resistance establishing said first reference voltage at the first input terminal of the differential amplifier; and the presence of the second output condition at the output terminal of the differential amplifier causing current to flow between the first source of reference potential and the output terminal throuGh the first resistance, current flow through the first resistance reverse biasing the first diode and causing the second source of reference potential to establish the second reference voltage at the first input terminal of the differential amplifier.
Claim 3
Dependent Claim
91 words
A limiter circuit in accordance with claim 1 wherein said quiescent voltage means includes two resistances connected in series between a third source of reference potential of the one polarity and a fourth source of reference potential of the opposite polarity with respect to said third source of reference potential; the signal input terminal is connected to the juncture of the two resistances of the quiescent voltage means; and the second input terminal of the differential amplifier is connected to the juncture of the two resistances of the quiescent voltage means.
Claim 4
Dependent Claim
100 words
A limiter circuit in accordance with claim 2 wherein said one polarity is positive with respect to ground and said opposite polarity is negative with respect to ground; said first output condition at the output terminal of the differential amplifier is a relatively high voltage level with respect to ground and the second output condition at the output terminal of the differential amplifier is a relatively low voltage level with respect to ground; said first and third sources of reference potential are positive with respect to ground; and said second and fourth sources of reference potential are at ground potential.
Claim 5
Dependent Claim
54 words
A limiter circuit in accordance with claim 3 wherein said first reference voltage is positive with respect to said quiescent voltage and differs from the quiescent voltage by a predetermined amount; and said second reference voltage is negative with respect to said quiescent voltage and differs from the quiescent voltage by said predetermined amount.
Claim 6
Dependent Claim
37 words
A limiter circuit in accordance with claim 4 wherein said differential amplifier is a differential voltage comparator with the first input terminal being a non-inverting input terminal and the second input terminal being an inverting input terminal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-05-30 | 1975-11-29 | 1976-05-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-05-30 | 1979-11-29 | 1980-05-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-05-30 | 1983-11-29 | 1984-05-30 | $7700.00 | Window Closed / Lapsed |