Gate circuit

Claim 2

A gate circuit comprising: a field effect transistor having first, second and third electrodes; a signal input terminal; a first capacitor connected in series with the signal path between said input terminal and said first electrode; a signal output terminal connected to said second electrode; means for applying a control signal to said third electrode of the field effect transistor to turn the field effect transistor off and on; means for applying a first bias voltage to said second electrode of the field effect transistor; and means for applying a second bias voltage to said first electrode of the field effect transistor and said means for applying said first and second bias voltages maintaining said first and second electrodes at the same direct current potential.

Claim 3

A gate circuit as claimed in claim 1 wherein said first, second and third electrodes of the field effect transistor are respectively a drain, a source and a gate.

Claim 4

A gate circuit as claimed in claim 1 wherein an impedance element is connected between said third electrode of the field effect transistor and ground.

Claim 5

A gate circuit as claimed in claim 1 wherein said first and second bias voltage applying means are respectively connected between said second electrode and a voltage source and said first electrode and said voltage source.

Claim 6

A gate circuit as claimed in claim 4 wherein both said bias voltage applying means have high impedance to a signal passing through the field effect transistor.

Claim 7

In a circuit for a radio receiver having: a front end circuit supplied with an input signal of radio frequency and frequency converting the supplied signal into a signal of intermediate frequency; an intermediate-frequency amplifier; a demodulator for demodulating the output of said intermediate-frequency amplifier; a signal output circuit connected to said demodulator; a first capacitor connected in series with the signal path and to said signal output circuit; a gate circuit connected to said first capacitor and in series to a path for the signal; a detecting circuit for producing a control signal in response to the level of the input signal and applying the control signal to said gate circuit, said gate circuit comprising a field effect transistor having first, second and third electrodes, said first and second electrodes connected in series with the path for the signal and said third electrode being supplied with said control signal from the detecting circuit to turn on and off the field effect transistor; means for applying a first bias voltage to said second electrode of the field effect transistor; and means for applying a second bias voltage to said first electrode of the field effect transistor, and said means for applying first and second bias voltages maintaining said first and second electrodes at the same direct current potential.

Claim 8

In a circuit for a radio receiver having: a front end circuit supplied with an input signal of radio frequency and frequency converting the supplied signal into a signal of intermediate frequency; an intermediate-frequency amplifier; a demodulator for demodulating the output of said intermediate-frequency amplifier; a signal output circuit connected to said demodulator; a first capacitor connected in series with the signal path and to said signal output circuit; a gate circuit connected to said first capacitor and in series to a path for the signal; a detecting circuit for producing a control signal in response to the level of the input signal and applying the control signal to said gate circuit, said gate circuit comprising a field effect transistor having first, second and third electrodes, said first and second electrodes connected in series with the path for the signal and said third electrode being supplied with said control signal from the detecting circuit to turn on and off the field effect transistor; means for applying a first bias voltage to said second electrode of the field effect transistor; and means for applying a second bias voltage to said first electrode of the field effect transistor, and said means for applying first and second bias voltages maintaining said first and second electrodes at the same direct current potential.

Claim 9

A circuit for a radio receiver as claimed in claim 6 wherein said first, second and third electrodes of the field effect transistor are respectively a drain, a source and gate.