Location identification system

Claim 2

A carrier wave transmitter providing a signal for transmitter identification comprising a. a source of constant frequency, continuous tones, said constant frequency being much less than a carrier wave frequency of the transmitter, b. means for gating the tones to carrier frequency transmitting means, said gating means including: i. means for sequentially passing and blocking the tones in response to an indication of the transmitter identification, to provide a coded signal including a predetermined number of sequential, equal duration, binAry identification bits, ii. means for blocking the tones for predetermined time intervals on each side of the first and last identification bits, each of said predetermined intervals being an integral multiple of the interval required for each identification bit to provide dead spaces having durations of a predetermined number of said identification bits before and after each occurrence of the coded signal, and iii. means for passing the tones for a predetermined time period before the occurrences of the dead space preceding the coded signal, each of said predetermined time periods being an integral multiple of the interval required for each identification bit to provide a synchronization signal.

Claim 3

The transmitter of claim 1 further including means for transmitting modulated carrier tones as binary bits having rise and fall times between changes of binary levels that are susceptible to durations as long as the time interval of the bits.

Claim 4

decoding means connected to said receiving means for decoding the binary location identification code portion of the received signals, said decoding means comprising: a. a level detector having its input connected to the output of said receiving means, b. a time delay circuit responsive to the level detector; and, c. a binary storage means having its input connected to the output of said time delay circuit for storing said location identification binary code; and,

Claim 5

decoding means connected to said receiving means for decoding the binary location identification code portion of the received signals, said decoding means comprising: a. a level detector having its input connected to the output of said receiving means, b. a time delay circuit responsive to the level detector; and, c. a binary storage means having its input connected to the output of said time delay circuit for storing said location identification binary code; and,

Claim 6

decoding means connected to said receiving means for decoding the binary location identification code portion of the received signals, said decoding means comprising: a. a level detector having its input connected to the output of said receiving means, b. a time delay circuit responsive to the level detector; and, c. a binary storage means having its input connected to the output of said time delay circuit for storing said location identification binary code; and,

Claim 7

decoding means connected to said receiving means for decoding the binary location identification code portion of the received signals, said decoding means comprising: a. a level detector having its input connected to the output of said receiving means, b. a time delay circuit responsive to the level detector; and, c. a binary storage means having its input connected to the output of said time delay circuit for storing said location identification binary code; and,

Claim 8

decoding means connected to said receiving means for decoding the binary location identification code portion of the received signals, said decoding means comprising: a. a level detector having its input connected to the output of said receiving means, b. a time delay circuit responsive to the level detector; and, c. a binary storage means having its input connected to the output of said time delay circuit for storing said location identification binary code; and,

Claim 9

decoding means connected to said receiving means for decoding the binary location identification code portion of the received signals, said decoding means comprising: a. a level detector having its input connected to the output of said receiving means, b. a time delay circuit responsive to the level detector; and, c. a binary storage means having its input connected to the output of said time delay circuit for storing said location identification binary code; and,

Claim 10

a receiver responsive to the carrier waves transmitted from the plural transmitters, said receiver including: a. means responsive to the synchronization signals, dead space and coded signals for separating the coded signals from the synchronization signals and dead space, and b. means responsive to the separating means for decoding the separated coded signal.

Claim 11

a receiver responsive to the carrier waves transmitted from the plural transmitters, said receiver including: a. means responsive to the synchronization signals, dead space and coded signals for separating the coded signals from the synchronization signals and dead space, and b. means responsive to the separating means for decoding the separated coded signal.

Claim 12

a receiver for receiving said continuous tone and said binary code location identification signals, said receiver including: a. receiving means for receiving the continuous tone and binary location identification code signals transmitted by said transmitting means; and, b. decoding means connected to said receiving means for decoding the binary location code identification portion of the received signals, said tone means comprising a radio frequency oscillator, an audio oscillator and a modulator, the outputs from said radio frequency oscillator and said audio oscillator being connected to the inputs of said modulator so that said modulator generates the continuous tone signal that is applied to said transmitting means, said coding means comprising a shift register and a control gate, the output from said shift register being applied to the input of said control gate, said control gate being connected to said transmission means to inhibit the passage of said continuous tone signal and enable the passage of a signal corresponding to the binary code output of said shift register upon the application of suitable control signal to said control gate, said coding means also comprising a delay circuit and a timer circuit, said shift register being connected to said delay circuit so as to apply a control pulse to said delay circuit, the output of said delay circuit being connected through said timer circuit to the control input of said control gate whereby after a predetermined time interval a control signal is applied to said control gate to allow said control gate to pass the output of said shift register.

Claim 13

a receiver for receiving said continuous tone and said binary code location identification signals, said receiver including: a. receiving means for receiving the continuous tone and binary location identification code signals transmitted by said transmitting means; and, b. decoding means connected to said receiving means for decoding the binary location code identification portion of the received signals, said tone means comprising a radio frequency oscillator, an audio oscillator and a modulator, the outputs from said radio frequency oscillator and said audio oscillator being connected to the inputs of said modulator so that said modulator generates the continuous tone signal that is applied to said transmitting means, said coding means comprising a shift register and a control gate, the output from said shift register being applied to the input of said control gate, said control gate being connected to said transmission means to inhibit the passage of said continuous tone signal and enable the passage of a signal corresponding to the binary code output of said shift register upon the application of suitable control signal to said control gate, said coding means also comprising a delay circuit and a timer circuit, said shift register being connected to said delay circuit so as to apply a control pulse to said delay circuit, the output of said delay circuit being connected through said timer circuit to the control input of said control gate whereby after a predetermined time interval a control signal is applied to said control gate to allow said control gate to pass the output of said shift register.

Claim 14

a receiver for receiving said continuous tone and said binary code location identification signals, said receiver including: a. receiving means for receiving the continuous tone and binary location identification code signals transmitted by said transmitting means; and, b. decoding means connected to said receiving means for decoding the binary location code identification portion of the received signals, said decoding means comprising: i. a level detector having its input connected to the output of said receiving means; ii. a time delay circuit responsive to the level detector; and, iii. a binary storage means having its input connected to the output of said time delay circuit for storing said location identification binary code; and

Claim 15

a receiver for receiving said continuous tone and said binary code location identification signals, said receiver including: a. receiving means for receiving the continuous tone and binary location identification code signals transmitted by said transmitting means; and, b. decoding means connected to said receiving means for decoding the binary location code identification portion of the received signals, said decoding means comprising: i. a level detector having its input connected to the output of said receiving means; ii. a time delay circuit responsive to the level detector; and, iii. a binary storage means having its input connected to the output of said time delay circuit for storing said location identification binary code; and

Claim 16

a receiver for receiving said continuous tone and said binary code location identification signals, said receiver including: a. receiving means for receiving the continuous tone and binary location identification code signals transmitted by said transmitting means; and, b. decoding means connected to said receiving means for decoding the binary location code identification portion of the received signals, said decoding means comprising: i. a level detector having its input connected to the output of said receiving means; ii. a time delay circuit responsive to the level detector; and, iii. a binary storage means having its input connected to the output of said time delay circuit for storing said location identification binary code; and

Claim 17

a receiver for receiving said continuous tone and said binary code location identification signals, said receiver including: a. receiving means for receiving the continuous tone and binary location identification code signals transmitted by said transmitting means; and, b. decoding means connected to said receiving means for decoding the binary location code identification portion of the received signals, said decoding means comprising: i. a level detector having its input connected to the output of said receiving means; ii. a time delay circuit responsive to the level detector; and, iii. a binary storage means having its input connected to the output of said time delay circuit for storing said location identification binary code; and

Claim 18

a display means connected to the output of said binary storage means for displaying the location identification binary code stored by said binary storage means; said decoding means further including: a level clamping circuit connected between said receiving means and said level detector; a synchronizing gate having signal and control inputs, the signal input being connected to the output of said level detector; a synchronizing flip-flop having its set input connected to the output of said synchronizing gate; a delay circuit having its input connected to the output of said synchronizing flip-flop; a hold and enable circuit having signal and control inputs, the signal input being connected to the output of said delay circuit; a clock having its trigger input connected to the output of said hold and enable circuit; a gate control circuit having its input connected to the output of said clock and having a plurality of control outputs, one of said control outputs being connected to a control input of said level detector, a second control output being connected to the control input of said hold and enable circuit, a third control output being connected to the control input of said ring counter, and a fourth control output being connected to said synchronizing gate; and, a signal gate having a signal input connected to the output of said gate control circuit and a control input connected to an output of said gate control circuit and an output connected to the input of said binary storage means.

Claim 19

a display means connected to the output of said binary storage means for displaying the location identification binary code stored by said binary storage means; said decoding means further including: a level clamping circuit connected between said receiving means and said level detector; a synchronizing gate having signal and control inputs, the signal input being connected to the output of said level detector; a synchronizing flip-flop having its set input connected to the output of said synchronizing gate; a delay circuit having its input connected to the output of said synchronizing flip-flop; a hold and enable circuit having signal and control inputs, the signal input being connected to the output of said delay circuit; a clock having its trigger input connected to the output of said hold and enable circuit; a gate control circuit having its input connected to the output of said clock and having a plurality of control outputs, one of said control outputs being connected to a control input of said level detector, a second control output being connected to the control input of said hold and enable circuit, a third control output being connected to the control input of said ring counter, and a fourth control output being connected to said synchronizing gate; and, a signal gate having a signal input connected to the output of said gate control circuit and a control input connected to an output of said gate control circuit and an output connected to the input of said binary storage means.

Claim 20

a display means connected to the output of said binary storage means for displaying the location identification binary code stored by said binary storage means, said decoding means further including a level clamping circuit connected to the output of said receiving means; a differential amplifier having one input connected to the output of said level clamping circuit; a monostable multivibrator having its input connected to the output of said differential amplifier and its output connected to the input of said level detector; first and second delay circuits having their inputs connected to an output of said monostable multivibrator; a control flip-flop having its reset input connected to the output of said first delay circuit; a potentiometer connected across voltage sources of opposite polarity and having its center tap connected to the output of said control flip-flop, the wiper arm of said potentiometer being connected to the second input of said differential amplifier; a gate control circuit having an input connected to the output of said second delay circuit, said gate control circuit having a plurality of outputs one of said control outputs being connected to a disable input of said second delay circuit, a second control output being connected to said level detector, a third control output being connected to the set input of said control flip-flop; a signal gate having its signal input connected to the output of said level detector and its control input connected to a further control output of said gate control circuit; a synchronizing gate having its signal input connected to the output of said level detector; a synchronizing flip-flop having its set input connected to the output of said synchronizing gate; a hold and enable circuit having signal and control inputs, the signal input being connected to the output of said synchronizing gate and the control input being connected to an output of said gate control circuit; and, a clock having its control input connected to the output of said hold and enable circuit and its signal output connected to said gate control circuit.

Claim 21

a display means connected to the output of said binary storage means for displaying the location identification binary code stored by said binary storage means, said decoding means further including a level clamping circuit connected to the output of said receiving means; a differential amplifier having one input connected to the output of said level clamping circuit; a monostable multivibrator having its input connected to the output of said differential amplifier and its output connected to the input of said level detector; first and second delay circuits having their inputs connected to an output of said monostable multivibrator; a control flip-flop having its reset input connected to the output of said first delay circuit; a potentiometer connected across voltage sources of opposite polarity and having its center tap connected to the output of said control flip-flop, the wiper arm of said potentiometer being connected to the second input of said differential amplifier; a gate control circuit having an input connected to the output of said second delay circuit, said gate control circuit having a plurality of outputs one of said control outputs being connected to a disable input of said second delay circuit, a second control output being connected to said level detector, a third control output being connected to the set input of said control flip-flop; a signal gate having its signal input connected to the output of said level detector and its control input connected to a further control output of said gate control circuit; a synchronizing gate having its signal input connected to the output of said level detector; a synchronizing flip-flop having its set input connected to the output of said synchronizing gate; a hold and enable circuit having signal and control inputs, the signal input being connected to the output of said synchronizing gate and the control input being connected to an output of said gate control circuit; and, a clock having its control input connected to the output of said hold and enable circuit and its signal output connected to said gate control circuit.

Claim 22

a display means connected to the output of said binary storage means for displaying the location identification binary code stored by said binary storage means, said binary storage means comprising: a bit amplifier and logic circuit having its signal input connected to the output of said signal gate and a control input connected to an output of said gate control circuit; a first shift register having its signal input connected to the output of said bit amplifier and logic circuit and its control input connected to an output of said gate control circuit; a first 5/9 decision logic circuit having its control input connected to an output of said gate control circuit and having its control output connected to said first shift register; a second shift register having its signal input connected to the output of said first shift register and its control input connected to the output of said gate control circuit; a second 5/9 decision logic circuit having its control input connected to an output of said gate control circuit and its control output connected to said second shift register; a third shift register having its signal input connected to the output of said second shift register and having its control input connected to an output of said gate control circuit, the output of a predetermined stage of said third shift register being connected to the reset inputs of said synchronous flip-flop; and gate control circuit and said first and second shift registers; a slave clock circuit having its control input connected to an output of said gate control circuit and having its clock output connected to the clock inputs of said first, second and third shift registers, said slave clock also being connected to said bit amplifier and logic cirCuit; and, a binary-coded decimal to display circuit having its signal inputs connected to the signal outputs of said first, second and third shift registers.

Claim 23

a display means connected to the output of said binary storage means for displaying the location identification binary code stored by said binary storage means, said binary storage means comprising: a bit amplifier and logic circuit having its signal input connected to the output of said signal gate and a control input connected to an output of said gate control circuit; a first shift register having its signal input connected to the output of said bit amplifier and logic circuit and its control input connected to an output of said gate control circuit; a first 5/9 decision logic circuit having its control input connected to an output of said gate control circuit and having its control output connected to said first shift register; a second shift register having its signal input connected to the output of said first shift register and its control input connected to the output of said gate control circuit; a second 5/9 decision logic circuit having its control input connected to an output of said gate control circuit and its control output connected to said second shift register; a third shift register having its signal input connected to the output of said second shift register and having its control input connected to an output of said gate control circuit, the output of a predetermined stage of said third shift register being connected to the reset inputs of said synchronous flip-flop; and gate control circuit and said first and second shift registers; a slave clock circuit having its control input connected to an output of said gate control circuit and having its clock output connected to the clock inputs of said first, second and third shift registers, said slave clock also being connected to said bit amplifier and logic cirCuit; and, a binary-coded decimal to display circuit having its signal inputs connected to the signal outputs of said first, second and third shift registers.

Claim 24

a display means connected to the output of said binary storage means for displaying the location identification binary code stored by said binary storage means, said decoding means further including: a level clamping circuit connected between said receiving means and said level detector; a synchronizing gate having signal and control inputs, the signal input being connected to the output of said level detector; a synchronizing flip-flop having its set input connected to the output of said synchronizing gate; a delay circuit having its input connected to the output of said synchronizing flip-flop; a hold and enable circuit having signal and control inputs, the signal input being connected to The output of said delay circuit; a clock having its trigger input connected to the output of said hold and enable circuit; a gate control circuit having its input connected to the output of said clock and having a plurality of control outputs, one of said control outputs being connected to a control input of said level detector, a second control output being connected to the control input of said hold and enable circuit, a third control output being connected to the control input of said ring counter, and a fourth control output being connected to said synchronizing gate; and, a signal gate having a signal input connected to the output of said gate control circuit and a control input connected to an output of said gate control circuit and an output connected to the input of said binary storage means.

Claim 25

a display means connected to the output of said binary storage means for displaying the location identification binary code stored by said binary storage means, said decoding means further including: a level clamping circuit connected between said receiving means and said level detector; a synchronizing gate having signal and control inputs, the signal input being connected to the output of said level detector; a synchronizing flip-flop having its set input connected to the output of said synchronizing gate; a delay circuit having its input connected to the output of said synchronizing flip-flop; a hold and enable circuit having signal and control inputs, the signal input being connected to The output of said delay circuit; a clock having its trigger input connected to the output of said hold and enable circuit; a gate control circuit having its input connected to the output of said clock and having a plurality of control outputs, one of said control outputs being connected to a control input of said level detector, a second control output being connected to the control input of said hold and enable circuit, a third control output being connected to the control input of said ring counter, and a fourth control output being connected to said synchronizing gate; and, a signal gate having a signal input connected to the output of said gate control circuit and a control input connected to an output of said gate control circuit and an output connected to the input of said binary storage means.

Claim 26

A location identification system comprising:

Claim 27

A location identification system comprising:

Claim 28

a display means connected to the output of said binary storage means for displaying the location identification binary code stored by said binary stoRage means; said decoding means further including: a level clamping circuit connected to the output of said receiving means; a differential amplifier having one input connected to the output of said level clamping circuit; a monostable multivibrator having its input connected to the output of said differential amplifier and its output connected to the input of said level detector; first and second delay circuits having their inputs connected to an output of said monostable multivibrator; a control flip-flop having its reset input connected to the output of said first delay circuit; a potentiometer connected across voltage sources of opposite polarity and having its center tap connected to the output of said control flip-flop, the wiper arm of said potentiometer being connected to the second input of said differential amplifier; a gate control circuit having an input connected to the output of said second delay circuit, said gate control circuit having a plurality of outputs one of said control outputs being connected to a disable input of said second delay circuit, a second control output being connected to said level detector, a third control output being connected to the set input of said control flip-flop; a signal gate having its signal input connected to the output of said level detector and its control input connected to a further control output of said gate control circuit; a synchronizing gate having its signal input connected to the output of said level detector; a synchronizing flip-flop having its set input connected to the output of said synchronizing gate; a hold and enable circuit having signal and control inputs, the signal input being connected to the output of said synchronizing gate and the control input being connected to an output of said gate control circuit; and a clock having its control input connected to the output of said hold and enable circuit and its signal output connected to said gate control circuit.

Claim 29

a display means connected to the output of said binary storage means for displaying the location identification binary code stored by said binary stoRage means; said decoding means further including: a level clamping circuit connected to the output of said receiving means; a differential amplifier having one input connected to the output of said level clamping circuit; a monostable multivibrator having its input connected to the output of said differential amplifier and its output connected to the input of said level detector; first and second delay circuits having their inputs connected to an output of said monostable multivibrator; a control flip-flop having its reset input connected to the output of said first delay circuit; a potentiometer connected across voltage sources of opposite polarity and having its center tap connected to the output of said control flip-flop, the wiper arm of said potentiometer being connected to the second input of said differential amplifier; a gate control circuit having an input connected to the output of said second delay circuit, said gate control circuit having a plurality of outputs one of said control outputs being connected to a disable input of said second delay circuit, a second control output being connected to said level detector, a third control output being connected to the set input of said control flip-flop; a signal gate having its signal input connected to the output of said level detector and its control input connected to a further control output of said gate control circuit; a synchronizing gate having its signal input connected to the output of said level detector; a synchronizing flip-flop having its set input connected to the output of said synchronizing gate; a hold and enable circuit having signal and control inputs, the signal input being connected to the output of said synchronizing gate and the control input being connected to an output of said gate control circuit; and a clock having its control input connected to the output of said hold and enable circuit and its signal output connected to said gate control circuit.

Claim 30

A location a location identification system as claimed in claim 3 wherein said source of tones comprises a radio frequency oscillator, an audio oscillator and a modulator, the outputs from said radio frequency oscillator and said audio oscillator being connected to the inputs of said modulator to derive a modulated signal, and means for applying the modulated signal to the means for gating.

Claim 31

A location identification system as claimed in claim 4 wherein said tone passing and blocking means comprises a shift register and a control gate, the output from said shift register being applied to the input of said control gate.

Claim 32

A location identification system comprising:

Claim 33

A location identification system comprising:

Claim 34

A location identification system as claimed in claim 6 wherein said transmitting means includes a preamplifier, a signal gate, and a power amplifier, the output of said modulator being connected to the input of said preamplifier, the output of said preamplifier being connected to the signal input of said gate and the output of said gate being applied to the input of said power amplifier, the output of said control gate being connected to the control inputs of said signal gate to inhibit or enable the passage of the continuous tone signal being generated by said modulator.

Claim 35

A location identification system as claimed in claim 7 wherein said continuous tone and said location identification binary code signals are a sub-audio frequency signals.

Claim 36

A receiver for constant time interval binary bits having rise and fall times between changes of binary levels that are susceptible to durations as long as the time intervals of the bits, said bits including sequential binary one levels forming a synchronizing signal followed by an information signal including a plurality of sequential, coded binary bits, one binary one bit following immediately after another binary one bit in the synchronizing signal, comprising a gate for passing the synchronizing signal, means responsive to a received signal passed by the gate for recognizing the binary one synchronizing signal in response to the amplitude of the received signal exceeding a predetermined level for more than one bit interval, means responsive to the recognizing means for closing the gate a predetermined time interval after the synchronizing signal has been recognized, said predetermined time interval being less than the rise time required for a bit to change between binary levels, and means for periodically sampling the sequential bits until all of the bits for a particular information signal have occurred, said means for sampling being responsive to the received signal at times following closing of the gate equal to integral multiples of the bit time interval, the number of samples being equal to the number of bits for a particular information signal.

Claim 37

A receiver for constant time interval binary bits having rise and fall times between changes of binary levels that are susceptible to durations as long as the time intervals of the bits, said bits including sequential binary one levels forming a synchronizing signal followed by an information signal including a plurality of sequential, coded binary bits, one binary one bit following immediately after another binary one bit in the synchronizing signal, comprising a gate for passing the synchronizing signal, means responsive to a received signal passed by the gate for recognizing the binary one synchronizing signal in response to the amplitude of the received signal exceeding a predetermined level for more than one bit interval, means responsive to the recognizing means for closing the gate a predetermined time interval after the synchronizing signal has been recognized, said predetermined time interval being less than the rise time required for a bit to change between binary levels, and means for periodically sampling the sequential bits until all of the bits for a particular information signal have occurred, said means for sampling being responsive to the received signal at times following closing of the gate equal to integral multiples of the bit time interval, the number of samples being equal to the number of bits for a particular information signal.

Claim 38

A location identification system comprising: 1 a plurality of transmitters, each of said transmitters including: a. a tone means for generating a continuous tone signal; b. a transmitting means connected to said tone mEans for transmitting said continuous tone signal; c. coding means for generating a binary location identification code, said coding means comprising a shift register for deriving a sequence of binary output bits and a control gate, the output bits from said shift register being applied in sequence to an input of said control gate, said control gate being connected to said transmitting means to inhibit the passage of said continuous tone signal and enable the passage of a signal corresponding to the binary code output of said shift register upon the application of suitable control signal to said control gate; and, d. gating means connected to the said transmitting means and to said coding means for interrupting the transmission of said continuous tone signal at spaced intervals and for applying said binary location identification code to said transmitting means so that a location identification is transmitted during said spaced intervals;

Claim 39

A location identification system comprising: 1 a plurality of transmitters, each of said transmitters including: a. a tone means for generating a continuous tone signal; b. a transmitting means connected to said tone mEans for transmitting said continuous tone signal; c. coding means for generating a binary location identification code, said coding means comprising a shift register for deriving a sequence of binary output bits and a control gate, the output bits from said shift register being applied in sequence to an input of said control gate, said control gate being connected to said transmitting means to inhibit the passage of said continuous tone signal and enable the passage of a signal corresponding to the binary code output of said shift register upon the application of suitable control signal to said control gate; and, d. gating means connected to the said transmitting means and to said coding means for interrupting the transmission of said continuous tone signal at spaced intervals and for applying said binary location identification code to said transmitting means so that a location identification is transmitted during said spaced intervals;

Claim 40

A location identification system as claimed in claim 10 including: a differential amplifier having one input connecting the output of said level clamping circuit; a potentiometer connected between voltage sources of opposite polarity and having its wiper arm connected to the second input of said differential amplifier; and, a monostable flip-flop having its input connected to the output of said differential amplifier and its output connected to the input of said level detector.

Claim 41

A location identification system as claimed in claim 10 wherein said binary storage means comprises: a bit amplifier and logic circuit having its signal input connected to the output of said signal gate and a control input connected to an output of said gate control circuit; a first shift register having its signal input connected to the output of said bit amplifier and logic circuit and its control input connected to an output of said gate control circuit; a first 5/9 decision logic circuit having its control input connected to an output of said gate control circuit and having its control output connected to said first shift register; a second shift register having its signal input connected to the output of said first shift register and its control input connected to the output of said gate control circuit; a second 5/9 decision logic circuit having its control input connected to an output of said gate control circuit and its control output connected to said second shift register; a third shift register having its signal input connected to the output of said second shift register and having its control input connected to an output of said gate control circuit, the output of a predetermined stage of said third shift register being connected to the reset inputs of said synchronous flip-flop; and gate control circuit and said first and second shift registers; a slave clock circuit having its control input connected to an output of said gate control circuit and having its clock output connected to the clock inputs of said first, second and third shift registers, said slave clock also being connected to said bit amplifier and logic circuit; and, a binary-coded decimal to display circuit having its signal inputs connected to the signal outputs of said first, second and third shift registers.

Claim 42

A location identification system as claimed in claim 12 wherein said display means is formed of first, second and third decimal display devices separately connected to outputs of said binary-coded decimal to display circuit.

Claim 43

A location identification system comprising:

Claim 44

A location identification system comprising:

Claim 45

A location identification system as claimed in claim 14 wherein said binary storage means comprises: a bit amplifier and logic circuit having its signal input connected to the output of said signal gate and a control input connected to an output of said gate control circuit; a first shift register having its signal input connected to the output of said bit amplifier and logic circuit and its control input connected to an output of said gate control circuit; a first 5/9 decision logic circuit having its control input connected to an output of said gate control circuit and having its control output connected to said first shift register; a second shift register having its signal input connected to the output of said first shift register and its control input connected to the output of said gate control circuit; a second 5/9 decision logic circuit having its control input connected to an output of said gate control circuit and its control output connected to said second shift register; a third shift register having its signal input connected to the output of said second shift register and having its control input connected to an output of said gate control circuit, the output of a predetermined stage of said third shift register being connected to the reset inputs of said synchronous flip-flop, said gate control circuit and said first and second shift registers; a slave clock circuit having its control input connected to an output of said gate control circuit and having its clock output connected to the clock inputs of said first, second and third shift registers, said slave clock also being connected to said bit amplifier and logic circuit; and, a binary-coded decimal to display circuit having its signal inputs connected to the signal outputs of said first, second and third shift registers.

Claim 46

A location identification system as claimed in claim 15 wherein said display means is formed of first, second and third decimal dispLay devices separately connected to the output of said binary-coded decimal to display circuit.

Claim 47

A transmitter suitable for use in a continuous tone controlled location identification system comprising: a tone means for generating a continuous tone signal; a transmitting means connected to said tone means for transmitting said continuous tone signal; coding means for generating a binary location identification code; and, gating means connected to the said transmitting means and to said coding means for interrupting the transmission of said continuous tone signal at spaced intervals and for applying said binary location identification code to said transmitting means so that a location identification code is transmitted during said spaced intervals, said tone means comprising a radio frequency oscillator, an audio oscillator and a modulator, the outputs from said radio frequency oscillator and said audio oscillator being connected to the inputs of said modulator so that said modulator generates the continuous tone signal that is applied to said transmitting means, said coding means comprising a shift register and a control gate, the output from said shift register being applied to the input of said control gate, said control gate being connected to said transmission means to inhibit the passage of said continuous tone signal and enable the passage of a signal corresponding to the binary output of said shift register upon the application of suitable control signal to said control gate, said coding means also comprising a delay circuit and a timer circuit, said shift register being connected to said delay circuit so as to apply a control pulse to said delay circuit, the output of said delay circuit being connected through said timer circuit to the control input of said control gate whereby after a predetermined time interval a control signal is applied to said control gate to allow said control gate to pass the output of said shift register.

Claim 48

A transmitter suitable for use in a continuous tone controlled location identification system comprising: a tone means for generating a continuous tone signal; a transmitting means connected to said tone means for transmitting said continuous tone signal; coding means for generating a binary location identification code; and, gating means connected to the said transmitting means and to said coding means for interrupting the transmission of said continuous tone signal at spaced intervals and for applying said binary location identification code to said transmitting means so that a location identification code is transmitted during said spaced intervals, said tone means comprising a radio frequency oscillator, an audio oscillator and a modulator, the outputs from said radio frequency oscillator and said audio oscillator being connected to the inputs of said modulator so that said modulator generates the continuous tone signal that is applied to said transmitting means, said coding means comprising a shift register and a control gate, the output from said shift register being applied to the input of said control gate, said control gate being connected to said transmission means to inhibit the passage of said continuous tone signal and enable the passage of a signal corresponding to the binary output of said shift register upon the application of suitable control signal to said control gate, said coding means also comprising a delay circuit and a timer circuit, said shift register being connected to said delay circuit so as to apply a control pulse to said delay circuit, the output of said delay circuit being connected through said timer circuit to the control input of said control gate whereby after a predetermined time interval a control signal is applied to said control gate to allow said control gate to pass the output of said shift register.

Claim 49

A transmitter as claimed in claim 17 wherein said transmitting means includes a preamplifier, a signal gate, and a power amplifier, the output of said modulator being connected to the input of said preamplifier, the output of said preamplifier being connected to the signal input of said gate and the output of said gate being applied to the input of said power amplifier, the output of said control gate being connected to the control inputs of said signal gate to inhibit or enable the passage of the continuous tone signal being generated by said modulator.

Claim 50

A receiver suitable for use in a continuous tone controlled location identification system comprising:

Claim 51

A receiver suitable for use in a continuous tone controlled location identification system comprising:

Claim 52

A receiver as claimed in claim 19 including: a differential amplifier having one input connecting the output of said level clamping circuit; a potentiometer connected between voltage sources of opposite polarity and having its wiper arm connected to the second input of said differential amplifier; and, a monostable flip-flop having its input connected to the output of said differential amplifier and its output connected to the input of said level detector.

Claim 53

A receiver as claimed in claim 20 wherein said continuous tone and said location identification binary code signals are in the range between sub-audio and low frequency audio signals.

Claim 54

A receiver suitable for use in a continuous tone controlled location identification system comprising:

Claim 55

A receiver suitable for use in a continuous tone controlled location identification system comprising:

Claim 56

A receiver as claimed in claim 22 wherein said display means is formed of first, second and third decimal display devices separately connected to outputs of said binary-coded decimal to display circuit.

Claim 57

A receiver suitable for use in a continuous tone controlled location identification system comprising:

Claim 58

A receiver suitable for use in a continuous tone controlled location identification system comprising:

Claim 59

A receiver as claimed in claim 24 wherein said binary storage means comprises: a bit amplifier and logic circuit having its signal input connected to the output of said signal gate and a control input connected to an output of said gate control circuit; a first shift register having its signal input connected to the output of said bit amplifier and logic circuit and its control input connected to an output of said gate control circuit; a first 5/9 decision logic circuit having its control input connected to an output of said gate control circuit and having its control output connected to said first shift register; a second shift register having its signal input connected to the output of said first shift register anD its control input connected to the output of said gate control circuit; a second 5/9 decision logic circuit having its control input connected to an output of said gate control circuit and its control output connected to said second shift register; a third shift register having its signal input connected to the output of said second shift register and having its control input connected to an output of said gate control circuit, the output of a predetermined stage of said third shift register being connected to the reset inputs of said synchronous flip-flop, said gate control circuit and said first and second shift registers; a slave clock circuit having its control input connected to an output of said gate control circuit and having its clock output connected to the clock inputs of said first, second and third shift registers, said slave clock also being connected to said bit amplifier and logic circuit; and, a binary-coded decimal to display circuit having its signal inputs connected to the signal outputs of said first, second and third shift registers.

Claim 60

A receiver as claimed in claim 25 wherein said display means is formed of first, second and third decimal display devices separately connected to the output of said binary-coded decimal to display circuit.