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US3665299A Expired / Lapsed US ⏱️ 0.0 years remaining

Test apparatus for determining continuity paths on a multiterminal arrangement

Assignee: Individual
•
Filing: 1970-03-02
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Granted: 1972-05-23
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Expires: 1990-03-02
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Abstract

Abstract Test apparatus preferably comprising a signal forming means connected to a selected drive point which is one of the terminals, scanning apparatus for scanning the plurality of terminals, means for ascertaining electrical continuity between the driven point and each scanned point whereby continuity is either desired or undesired depending on the accuracy and faithfulness of wiring to the plurality of terminals, and output means identifying errors in test point wiring between the terminals.

Inventors

  • 👤 Kenneth A Yarbrough

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 03:24
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/50; G01R31/58; G01R31/60

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 325 words
A test apparatus for testing for undesired electrical connections among a plurality of terminals with selected conductive paths connected to at least two of such terminals wherein the number of terminals may be increased essentially without limit and wherein the terminals are subject to designation in a coordinate system and have locations given by 1, 2, 3, .... M, and 1, 2, 3, 4, .... N, in X-Y coordinates and the apparatus comprising: first means connected to a plurality of the terminals; said first means including an X storage register means of M capacity and a Y storage register means of N capacity; means for inputting to said X and Y storage register means a X-Y designation of a terminal; signal forming means for imposing an electrical condition at the terminal indicated by the designation in said X and Y storage register means; a gate means connected to each of the plurality of terminals to be scanned, said gate means being connected to the plurality of terminals in a manner such that an indicia of the electrical condition of the terminal is communicated to said respective gate means; second X and Y storage register means having respectively capacities of M and N; means for inputting a terminal designation signal into said second X and Y storage register means of value equal to or less than M and N to designate a terminal; connective means connected so said second X and Y storage register means, said connective means forming unique enable signals for selected ones of said gate means; said gate means, on receipt of enable signals, enabling said gate means to form output signals related to the electrical condition of the terminals connected thereto; and, comparator circuit means provided with output signals from said gate means and also adapted to be provided with signals to be compared with such output signals, and forming a comparative output signal when the compared signals achieve a desired comparison.
Claim 2
Dependent Claim 325 words
A test apparatus for testing for undesired electrical connections among a plurality of terminals with selected conductive paths connected to at least two of such terminals wherein the number of terminals may be increased essentially without limit and wherein the terminals are subject to designation in a coordinate system and have locations given by 1, 2, 3, .... M, and 1, 2, 3, 4, .... N, in X-Y coordinates and the apparatus comprising: first means connected to a plurality of the terminals; said first means including an X storage register means of M capacity and a Y storage register means of N capacity; means for inputting to said X and Y storage register means a X-Y designation of a terminal; signal forming means for imposing an electrical condition at the terminal indicated by the designation in said X and Y storage register means; a gate means connected to each of the plurality of terminals to be scanned, said gate means being connected to the plurality of terminals in a manner such that an indicia of the electrical condition of the terminal is communicated to said respective gate means; second X and Y storage register means having respectively capacities of M and N; means for inputting a terminal designation signal into said second X and Y storage register means of value equal to or less than M and N to designate a terminal; connective means connected so said second X and Y storage register means, said connective means forming unique enable signals for selected ones of said gate means; said gate means, on receipt of enable signals, enabling said gate means to form output signals related to the electrical condition of the terminals connected thereto; and, comparator circuit means provided with output signals from said gate means and also adapted to be provided with signals to be compared with such output signals, and forming a comparative output signal when the compared signals achieve a desired comparison.
Claim 3
Dependent Claim 71 words
The invention of claim 1 wherein said first means includes switching transistor means connected to each of the plurality of terminals, and said first X and Y storage register means are connected to said switching transistor means such that a unique designation of a terminal encoded as X and Y values equal to or less than M and N respectively alters the operative condition of one of said switching transistor means.
Claim 4
Dependent Claim 45 words
The invention of claim 2 wherein said one switching transistor means has one terminal connected to one of a plurality of conductors common to X-coordinates of the terminals, and another terminal connected to one of a plurality of conductors common to Y-coordinates of the terminals.
Claim 5
Dependent Claim 32 words
The invention of claim 3 including a decoder means connected to said first X storage register means which forms a binary signal on only one of said conductors common to X-coordinate terminals.
Claim 6
Dependent Claim 32 words
The invention of claim 3 including a decoder means connected to said first Y storage register means which forms a binary signal on only one of said conductors common to Y-Coordinate terminals.
Claim 7
Dependent Claim 32 words
The invention of claim 3 wherein additional of said switching transistor means are connected to the one of the plurality of conductors but all of which are not altered in operative condition.
Claim 8
Dependent Claim 46 words
The invention of claim 6 wherein each of said gate means has three inputs which are: the first is connected to the terminal associated therewith; the second is connected to one of the X-coordinate conductors; and, the third is connected to one of the Y-coordinate conductors.
Claim 9
Dependent Claim 35 words
The invention of claim 1 wherein said comparator means receives as an input the coordinates in said second X and Y storage register means, and signals giving X and Y coordinates of a selected terminal.
Claim 10
Dependent Claim 49 words
The invention of claim 1 wherein said first X and Y storage register means are incremented by a clock means running freely until stopped by a predetermined event until said first and second storage means have counted jointly to a maximum of M by N in a sequential pattern.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-05-23 1975-11-22 1976-05-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-05-23 1979-11-22 1980-05-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-05-23 1983-11-22 1984-05-23 $7700.00 Window Closed / Lapsed

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