US3665265A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Mos integrated circuit semiconductor device
Assignee: NEC Corp
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Filing: 1970-10-27
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Granted: 1972-05-23
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Expires: 1990-10-27
Abstract
Abstract An MOS integrated circuit having a duplex insulating material structure wherein an aluminum oxide layer is disposed over the silicon oxide layer. Gate insulating material is protected against contamination from organic solvent and photoresist. In an n-channel device, the threshold voltage of the thick insulating material is increased to thereby reduce the likelihood of parasitic or leakage conduction between adjacent MOS transistors in the circuit.
Inventors
- 👤 Syoji Fujimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 09:32
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D99/00; H10W74/00; H10W74/40; H10W74/43
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
130 words
A MOS integrated circuit comprising a semiconductor substrate of p type conductivity type, a plurality of conduction regions of n-type conductivity type formed on one surface of said semiconductor substrate, a silicon oxide film disposed over said substrate surface, an aluminum gate electrode disposed on said oxide film at a gate insulating region, an aluminum interconnection region for interconnecting circuit elements included in said integrated circuit formed on said oxide film, and an aluminum oxide layer formed on the entire surface of said oxide film except for the area of said gate electrode and said interconnection region and contacting said gate electrode and said interconnection region so that said oxide layer, said gate electrode, and said interconnEction region establish a continuous layer covering the entire surface of said insulating film.
Claim 2
Dependent Claim
130 words
A MOS integrated circuit comprising a semiconductor substrate of p type conductivity type, a plurality of conduction regions of n-type conductivity type formed on one surface of said semiconductor substrate, a silicon oxide film disposed over said substrate surface, an aluminum gate electrode disposed on said oxide film at a gate insulating region, an aluminum interconnection region for interconnecting circuit elements included in said integrated circuit formed on said oxide film, and an aluminum oxide layer formed on the entire surface of said oxide film except for the area of said gate electrode and said interconnection region and contacting said gate electrode and said interconnection region so that said oxide layer, said gate electrode, and said interconnEction region establish a continuous layer covering the entire surface of said insulating film.
Claim 3
Dependent Claim
19 words
The integrated circuit of claim 1, in which said silicon oxide layer includes a reduced thickness gate insulating region.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-05-23 | 1975-11-22 | 1976-05-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-05-23 | 1979-11-22 | 1980-05-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-05-23 | 1983-11-22 | 1984-05-23 | $7700.00 | Window Closed / Lapsed |