US3665223A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multiple potentiometer timer for elevator controls
Assignee: ARTHUR H BERNDTSON
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Filing: 1969-11-28
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Granted: 1972-05-23
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Expires: 1989-11-28
Abstract
Abstract A timer circuit produces an output signal at a predetermined time following the application of an input signal. The input signal actuates a timing circuit which, at a specified time thereafter, causes a switching device to be actuated, which in turn produces the output signal. One or more of a plurality of control means are selectively insertable into the timing circuit, thereby to select one of a plurality of available time intervals between the input and output signals.
Inventors
- 👤 James H Stichweh
- 👤 Stephen A Hornung
- 👤 Paul Duckwall
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 03:46
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/13; B; B66; B66B; B66B1/00; B66B1/34; B66B1/46; H03K17/00; H03K17/28; H03K17/292
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
120 words
A timing circuit for producing an output signal a predetermined time after the appearance of an input signal, said circuit comprising a first switching means connected for receiving said input signal, a second switching means having first and second inputs and an output for providing said output signal, a timing means connected to said first switching means and to said first input of said second switching means and effective a predetermined time after the actuation of said first switching means to actuate said second switching means, and a plurality of control means selectively connected to said second input for preconditioning said second switching means for actuation by said timing means to provide one of a plurality of predetermined timing intervals.
Claim 2
Dependent Claim
120 words
A timing circuit for producing an output signal a predetermined time after the appearance of an input signal, said circuit comprising a first switching means connected for receiving said input signal, a second switching means having first and second inputs and an output for providing said output signal, a timing means connected to said first switching means and to said first input of said second switching means and effective a predetermined time after the actuation of said first switching means to actuate said second switching means, and a plurality of control means selectively connected to said second input for preconditioning said second switching means for actuation by said timing means to provide one of a plurality of predetermined timing intervals.
Claim 3
Dependent Claim
32 words
The circuit of claim 1, wherein said second switching means includes a unijunction transistor having a gate input connected to said control means and an anode input connected to said timing means.
Claim 4
Dependent Claim
64 words
The circuit of claim 1, and including a power source means for providing electrical power, said timing means including a first capacitance means selectively connected to be charged by said source means and further connected to said first input, said first switching means responsive to said input signal for effectively connecting said first capacitance means to said source means for initiating a timing sequence.
Claim 5
Dependent Claim
53 words
The circuit of claim 3, and including a connecting means for selectively connecting said plurality of control means to said second input for providing said output signal at a selected one of a Plurality of pre-established timing intervals in response to said input signal and to the selective operation of said connecting means.
Claim 6
Dependent Claim
48 words
The timing circuit of claim 1, including a power source means for providing electrical power, and wherein said timing means is operatively connected to said source means for providing a voltage varying with time to said first input in response to the operation of said first switching means.
Claim 7
Dependent Claim
37 words
The circuit of claim 5, wherein said first switching means operatively connects said source means to a ground potential and to said timing means and provides current to said timing means in response to said input signal.
Claim 8
Dependent Claim
68 words
The circuit of claim 1, wherein said control means includes a voltage divider circuit having first and second impedance means serially connected forming a juncture point therebetween, said juncture point connected to said second input of said second switching means, said second impedance means including a plurality of impedance elements operatively parallel connected for providing a plurality of preset voltages to second input of said second switching means.
Claim 9
Dependent Claim
44 words
The circuit of claim 7, wherein said second impedance means includes a capacitor and first, second and third resistive elements operatively parallel connected by first, second and third control switches, respectively, for selecting one of a plurality of preset voltages for said juncture point.
Claim 10
Dependent Claim
40 words
The circuit of claim 1, wherein said timing means includes a serially connected resistor and capacitor having a first juncture point therebetween connected to said first input of said second switching means for selectively providing a voltage varying with time.
Claim 11
Dependent Claim
40 words
The circuit of claim 9, wherein said timing means further includes a pair of serially connected resistors forming a second juncture point therebetween, and a diode connected to said first and second juncture points for conducting current to said capacitor.
Claim 12
Dependent Claim
27 words
The circuit of claim 9, and including a serially connected diode and second resistor parallel connected with said first resistor for selectively allowing said capacitor to discharge.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-05-23 | 1975-11-22 | 1976-05-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-05-23 | 1979-11-22 | 1980-05-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-05-23 | 1983-11-22 | 1984-05-23 | $7700.00 | Window Closed / Lapsed |