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US3663885A Expired / Lapsed US ⏱️ 0.0 years remaining

Family of frequency to amplitude converters

Assignee: National Aeronautics and Space Administration
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Filing: 1971-04-16
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Granted: 1972-05-16
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Expires: 1991-04-16
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Abstract

Abstract A family of frequency to amplitude converters is disclosed which convert an incoming signal of a complex waveform and unknown frequency into an output signal corresponding in amplitude to the unknown frequency of the input signal thereby permitting accurate determination of the frequency of the complex input signal waveform.

Inventors

  • 👤 Carrington H Stewart

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 00:03
CPC Classifications
G; G01; G01R; G01R23/00; G01R23/02; G01R23/10

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 125 words
An apparatus for conversion of the frequency of an input signal into the amplitude of an output signal for analysis and like purposes, comprising: a. means for providing a series of clock pulses; b. means responsive to signal level transitions of the input signal for controlling the conversion apparatus; c. counting means responsive to said controlling means for providing an output count of the clock pulses produced by said clock means; d. converter means responsive to said counting means for producing an output signal amplitude responsive to the output count of said counting means, wherein the output signal amplitude indicates the duration between level transitions of the input signal; and e. limit means for establishing a predetermined limit frequency for operation of the conversion apparatus.
Claim 2
Independent Claim 125 words
An apparatus for conversion of the frequency of an input signal into the amplitude of an output signal for analysis and like purposes, comprising: a. means for providing a series of clock pulses; b. means responsive to signal level transitions of the input signal for controlling the conversion apparatus; c. counting means responsive to said controlling means for providing an output count of the clock pulses produced by said clock means; d. converter means responsive to said counting means for producing an output signal amplitude responsive to the output count of said counting means, wherein the output signal amplitude indicates the duration between level transitions of the input signal; and e. limit means for establishing a predetermined limit frequency for operation of the conversion apparatus.
Claim 3
Dependent Claim 44 words
The structure of claim 1, wherein said limit means comprises: lower limit means for disabling said counting means in response to a predetermined output count from said counting means providing a lower frequency limit for conversion of the input frequency into an output amplitude.
Claim 4
Dependent Claim 41 words
The structure of claim 1, wherein said limit means comprises: upper limit means for preventing an output count lower than a predetermined minimum output count thereby providing an upper frequency limit for conversion of the input frequency into an output amplitude.
Claim 5
Dependent Claim 30 words
The structure of claim 1, further including: storage means for storing the output count of said counting means, said storage means presenting the stored output count to said converter means.
Claim 6
Dependent Claim 26 words
The structure of claim 5, wherein said controlling means comprises: means for initiating transfer of the output count from said counting means to said storage Means.
Claim 7
Dependent Claim 60 words
The structure of claim 1, wherein said controlling means comprises: logic means responsive to a first signal level transition of the input signal for permitting clock pulses from said clock to drive said counting means, said logic means being further responsive to a second signal level transition of the input signal, preventing subsequent clock pulses from driving said counting means.
Claim 8
Dependent Claim 46 words
The structure of claim 1, wherein said controlling means comprises: counter clear means for resetting said counting means to a predetermined initial count in response to a level transition of the input signal, thereby causing said counting means to begin counting at the proper initial count.
Claim 9
Dependent Claim 74 words
The structure of claim 1, wherein said converter means comprises: a. first converter means responsive to said counting means for producing an output signal amplitude indicating a low frequency input signal; and b. second converter means responsive to said counting means for producing an output signal amplitude indicating a high input signal, wherein a plurality of output signals varying in amplitude in accordance with the input frequencies are available for analysis and like purposes.
Claim 10
Dependent Claim 72 words
The structure of claim 8, further including storage means, said storage means comprising: a. first storage means for storing the output count of said counting means, said first storage means presenting the stored output count to said first converter means for conversion; and b. second storage means for storing the output count of said counting means, said second storage means presenting the stored output count to said second converter means for conversion.
Claim 11
Dependent Claim 24 words
The structure of claim 1, wherein said controlling means comprises: means responsive to zero-axis crossings of the input signal for controlling the conversion apparatus.

References Cited (Backward Citations)

US2831162A Cited
US3413449A Cited
US3432687A Cited
US3430149A Cited
US3512013A Cited
US3524131A Cited
US3526841A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-05-16 1975-11-15 1976-05-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-05-16 1979-11-15 1980-05-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-05-16 1983-11-15 1984-05-16 $7700.00 Window Closed / Lapsed

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