Electrical weighing system with analog-to-digital dual ramp converter

Claim 2

In a weighing apparatus, a structure for receiving a load to be weighed, electrical signal producing means responsive to the weight of a load applied to said structure for producing a D.C. signal having a magnitude that is a function of the weight of the load applied to said structure, an analog-to-digital converter operatively connected to said signal producing means for recurrently converting said D.C. signal into digital form, a pulse counter having its input connected to the output of said converter, signal utilization means operatively connected to the output of said counter, said converter being operative in each conversion of said D.C. signal to supply to the input of said counter a series of sequentially occurring pulses of equal time separation during a first predetermined time interval and a second time interval following said first time interval, with the second time interval being proportional to the magnitude of said D.C. signal applied to said converter, first circuit means for resetting said counter to a predetermined starting count at the beginning of said first time interval, and second circuit means operatively connected to said counter and being responsive to said counter being driven to a predetermined intermediate scale count during said first time interval for resetting said counter to said starting count at the end of said first time interval, said predetermined intermediate scale count being less than the maximum count to which said counter can be driven by the converter produced pulses during said second time interval, and said second circuit means including means for preventing said counter from being reset to said starting count during said second time interval under conditions where the counter is driven to a count equal or exceeding said intermediate scale count.

Claim 3

The weighing apparatus defined in claim 1 wherein said signal utilization means comprises means providing a digital read-out of the output of said counter at the end of said second time interval.

Claim 4

The weighing apparatus defined in claim 1 comprising third circuit means operatively connected between the output of said counter and said signal utilization means, means in said converter for supplying a memory command signal to said third circuit means at the end of said second time interval, said third circuit means being responsive to said memory command signal to memorize the output of said counter and to supply the memorized counter output to said signal utilization means, and said signal utilization means being operative to provide a read-out of the memorized counter output supplied by said third circuit means.

Claim 5

In a weighing apparatus, a structure for receiving a load to be weighed, electrical signal producing means responsive to the weight of a load applied to said structure for producing an electrical analog signal having a magnitude that is a function of the weight of the load applied to said structure, a dual ramp analog-to-digital converter, means operatively connecting the input of said converter to said signal producing means to apply said analog signal to the input of said converter, said converter having an integrating circuit for integrating a sample of said analog signal during a first time interval, and said converter being responsive to a predetermined control signal to terminate the integration of said analog signal and to apply a reference signal of known magnitude to said integrating circuit for integrating said reference signal for a second Time interval that is proportional to the magnitude of said analog signal, said converter further including a pulse generator for producing sequentially occurring pulses of equal time separation and gate means controlled by the integrated output of said integrating circuit to supply an output of the generator-produced pulses during both said first and second time intervals, with the number of pulses supplied during said second time interval being representative of the magnitude of said analog signal, a pulse counter driven by the pulses supplied by said gate means for producing at its output binary coded data information representing the number of counter pulses in each of said first and second time intervals, control circuit means operatively connected to said counter and to said converter and being responsive to the count-in of a predetermined number of pulses by the counter during said first time interval for supplying said control signal to said converter and further for feeding back said control signal to reset said counter to a predetermined starting count at the end of said first time interval, storage circuit means operatively connected to the output of said counter and being responsive to a predetermined memory command signal for memorizing the binary coded data information supplied at the output of said counter, means in said converter for supplying said command signal to said storage circuit means at the end of said second time interval, means providing a read-out of the binary coded data information that is memorized by said storage circuit means, and means forming a part of said control circuit means for preventing said counter from being reset by a re-occurrence of said control signal in said second time interval.

Claim 6

In a weighing apparatus, a structure for receiving a load to be weighed, electrical signal producing means responsive to the weight of a load applied to said structure for producing an electrical analog signal having a magnitude that is a function of the weight of the load applied to said structure, a dual ramp analog-to-digital converter, means operatively connecting the input of said converter to said signal producing means to apply said analog signal to the input of said converter, said converter having an integrating circuit for integrating a sample of said analog signal during a first time interval, and said converter being responsive to a predetermined control signal to terminate the integration of said analog signal and to apply a reference signal of known magnitude to said integrating circuit for integrating said reference signal for a second Time interval that is proportional to the magnitude of said analog signal, said converter further including a pulse generator for producing sequentially occurring pulses of equal time separation and gate means controlled by the integrated output of said integrating circuit to supply an output of the generator-produced pulses during both said first and second time intervals, with the number of pulses supplied during said second time interval being representative of the magnitude of said analog signal, a pulse counter driven by the pulses supplied by said gate means for producing at its output binary coded data information representing the number of counter pulses in each of said first and second time intervals, control circuit means operatively connected to said counter and to said converter and being responsive to the count-in of a predetermined number of pulses by the counter during said first time interval for supplying said control signal to said converter and further for feeding back said control signal to reset said counter to a predetermined starting count at the end of said first time interval, storage circuit means operatively connected to the output of said counter and being responsive to a predetermined memory command signal for memorizing the binary coded data information supplied at the output of said counter, means in said converter for supplying said command signal to said storage circuit means at the end of said second time interval, means providing a read-out of the binary coded data information that is memorized by said storage circuit means, and means forming a part of said control circuit means for preventing said counter from being reset by a re-occurrence of said control signal in said second time interval.