US3662228A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit arrangement for generating a signal and for suppressing voltage peaks
Assignee: Robert Bosch GmbH
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Filing: 1970-07-17
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Granted: 1972-05-09
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Expires: 1990-07-17
Abstract
Abstract The diode comprised between two electrodes of a transistor is shunted across the inductor, the third transistor electrode being the output electrode. The diode is connected with respect to its polarity so that it only conducts when the current flow through the inductor is broken.
Inventors
- 👤 Karl-Ernst Boeters
- 👤 Gerhard Conzelmann
- 👤 Klaus Streit
- 👤 Hans-Joachim Fleischer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 11:13
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/08; H03K17/081; H03K17/0814; H03K17/08146; H03K17/51; H03K17/56; H03K17/60; H03K17/64; H10; H10D; H10D84/00; H10D84/60; H10D84/63; H10D89/00; H10D89/60
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
127 words
A circuit arrangement for generating an output voltage signal and for suppressing voltage peaks, comprising, in combination, inductor means having two terminals; switch means connected to one of said two terminals and defining a switching path to said inductor means and causing voltage peaks induced in said inductor means when said switching means are operated; and a transistor having two electrodes and an output electrode, said two electrodes being connected to respective ones of said two terminals and defining a diode having a predetermined polarity, said polarity being selected so that said diode is rendered conductive to conduct the current of said inductor means only when said switch means are open, whereby the output voltage signal appears on said output electrode and the voltage peaks are suppressed.
Claim 2
Dependent Claim
127 words
A circuit arrangement for generating an output voltage signal and for suppressing voltage peaks, comprising, in combination, inductor means having two terminals; switch means connected to one of said two terminals and defining a switching path to said inductor means and causing voltage peaks induced in said inductor means when said switching means are operated; and a transistor having two electrodes and an output electrode, said two electrodes being connected to respective ones of said two terminals and defining a diode having a predetermined polarity, said polarity being selected so that said diode is rendered conductive to conduct the current of said inductor means only when said switch means are open, whereby the output voltage signal appears on said output electrode and the voltage peaks are suppressed.
Claim 3
Dependent Claim
46 words
A circuit arrangement as defined in claim 1, wherein said switching means are a switching transistor, and said two electrodes are the base and the collector, and said output electrode is the emitter, and said switching transistor and said transistor are of the same conductive type.
Claim 4
Dependent Claim
48 words
A circuit arrangement as defined in claim 2, including an operating voltage, and wherein respective ones of said two terminals are connected to the collector of said switching transistor and said operating voltage, and the base of said transistor is connected to the collector of said switching transistor.
Claim 5
Dependent Claim
92 words
A circuit arrangement as defined in claim 2, including first and second operating voltages of the same polarity, said second operating voltage being greater than said first operating voltage, and wherein the emitter and the base of said transistor are respectively connected to said first operating voltage and the collector of said switching transistor, and respective ones of said two terminals are connected to the collector of said switching transistor and the emitter of said transistor, and further including resistance means connecting the collector of said transistor to said second operating voltage.
Claim 6
Dependent Claim
75 words
A circuit arrangement as defined in claim 1, including an operating voltage, and wherein said switch means are a switching transistor, and said transistor and said switching transistor are of oppositely conductive types, and respective ones of said two terminals are connected to the collector of said switching transistor and said operating voltage, the base and the emitter of said transistor are respectively connected to said operating voltage and the collector of said switching transistor.
Claim 7
Dependent Claim
25 words
A circuit arrangement as defined in claim 1, wherein said two electrodes are the base and the emitter, and said output electrode is the collector.
Claim 8
Dependent Claim
17 words
A circuit arrangement as defined in claim 1, including resistance means connected in series with said diode.
Claim 9
Dependent Claim
21 words
A circuit arrangement as defined in claim 1, wherein at least part of the circuit arrangement is a monolithic integrated circuit.
Claim 10
Dependent Claim
26 words
A circuit arrangement as defined in claim 1, wherein the surface area of said output electrode is smaller than that of either of said two electrodes.
References Cited (Backward Citations)
US3340407A
Cited
US3320551A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-05-09 | 1975-11-08 | 1976-05-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-05-09 | 1979-11-08 | 1980-05-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-05-09 | 1983-11-08 | 1984-05-09 | $7700.00 | Window Closed / Lapsed |