← Back to Patent Explorer
US3660845A Expired / Lapsed US ⏱️ 0.0 years remaining

Radar unit arrangement for determining in received echo pulses the position of the pulse center and the pulse duration

Assignee: Telefonaktiebolaget LM Ericsson AB
•
Filing: 1970-01-05
•
Granted: 1972-05-02
•
Expires: 1990-01-05
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A radar unit arrangement for determining the position of the pulse center and the pulse duration of the received echo pulses. The echo pulses gate a number of subpulses to a first binary updown counter which counts the subpulses. A second binary up-down counter receives a pulse from the first each time a certain value is exceeded. A third binary counter indicates the time elapsed from the moment of the emitting a radar pulse. The contents of the second and the third binary counter are continuously compared in a comparator which each time equality is obtained activates a bistable circuit. The first and the second binary counters are controlled by the bistable circuit so as to switch the counting direction of the counter in such a way that the number of subpulses before and after the change of state of the bistable circuit will be the same.

Inventors

  • 👤 George Gustaf Lenna Pettersson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 23:28
CPC Classifications
G; G04; G04F; G04F10/00; G04F10/04; G01; G01S; G01S7/00; G01S7/02; G01S7/28

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 367 words
A radar unit arrangement for determining at least one of the two parameters of received echo pulses, namely the position of the center of an echo pulse and the duration of the echo pulse, said arrangement comprising: a pulse generator for generating a sequence of subpulses; an AND-gate circuit having a first inlet for receiving the echo pulses, a second inlet connected to said pulse generator and an outlet so that when an echo pulse is received at said one inlet a number of subpulses are transmitted from said outlet; a first pulse counter having a counting inlet connected to the outlet of said tAND-gate circuit, a control input means for controlling said pulse counter to up count or down count, and an overflow outlet which emits a pulse each time the absolute value of the count in said counter exceeds predetermined values, a second pulse counter having a counting inlet connected to the overflow outlet of said fist counter, a control input means for controlling said pulse counter to up count or down count, and an outlet means for transmitting signals representing the instantaneous value of the count in said counter; a third pulse counter having an inlet for for receiving said subpulses, and an outlet means for transmitting signals representing the instantaneous value of the count in said counter to indicate the elapsed time from a given instant of time; a comparator means having inlets connected to the outlets of said second and third pulse counters and an outlet for emitting a pulse whenever an equality is sensed; a bistable circuit having a first inlet adapted to receive a pulse at the start of each radar scan to switch said bistable circuit to a first state, a second inlet connected to the outlet of said comparator means to switch said bistable circuit to a second state and outlet means connected to the control input means of said first and second pulse counters so that when said bistable means is in said first state said counters down count and when in said second state said counters up count whereby the number of subpulse occuring before and after each switching of said bistable circuit approaches an equality.
Claim 2
Dependent Claim 367 words
A radar unit arrangement for determining at least one of the two parameters of received echo pulses, namely the position of the center of an echo pulse and the duration of the echo pulse, said arrangement comprising: a pulse generator for generating a sequence of subpulses; an AND-gate circuit having a first inlet for receiving the echo pulses, a second inlet connected to said pulse generator and an outlet so that when an echo pulse is received at said one inlet a number of subpulses are transmitted from said outlet; a first pulse counter having a counting inlet connected to the outlet of said tAND-gate circuit, a control input means for controlling said pulse counter to up count or down count, and an overflow outlet which emits a pulse each time the absolute value of the count in said counter exceeds predetermined values, a second pulse counter having a counting inlet connected to the overflow outlet of said fist counter, a control input means for controlling said pulse counter to up count or down count, and an outlet means for transmitting signals representing the instantaneous value of the count in said counter; a third pulse counter having an inlet for for receiving said subpulses, and an outlet means for transmitting signals representing the instantaneous value of the count in said counter to indicate the elapsed time from a given instant of time; a comparator means having inlets connected to the outlets of said second and third pulse counters and an outlet for emitting a pulse whenever an equality is sensed; a bistable circuit having a first inlet adapted to receive a pulse at the start of each radar scan to switch said bistable circuit to a first state, a second inlet connected to the outlet of said comparator means to switch said bistable circuit to a second state and outlet means connected to the control input means of said first and second pulse counters so that when said bistable means is in said first state said counters down count and when in said second state said counters up count whereby the number of subpulse occuring before and after each switching of said bistable circuit approaches an equality.
Claim 3
Dependent Claim 21 words
The arrangement according to claim 1 wherein the inlet of said third pulse counter is connected directly to said pulse generator.
Claim 4
Dependent Claim 23 words
The arrangement according to claim 1 wherein the inlet of said third pulse counter is connected to the outlet of said AND-gate circuit.

References Cited (Backward Citations)

US3004707A Cited
US3181145A Cited
US3264645A Cited
US3403396A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-05-02 1975-11-01 1976-05-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-05-02 1979-11-01 1980-05-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-05-02 1983-11-01 1984-05-02 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag