Transmission line series termination network for interconnecting high speed logic circuits

Claim 2

A driver circuit for driving an external transmission line load having a load impedance value much greater than the transmission line characteristic impedance, said driver circuit comprising in combination: a logic circuit having at least first and second states; a series termination network connecting said logic circuit in series with said external transmission line load; and, said series termination network including at least first and second impedance branches, said network being connected to be conditioned by said logic circuit to apply a predetermined voltage level to said external load through said first impedance branch when said logic circuit is in said first state and said network being connected to be conditioned by said logic circuit when in said second state so as to terminate said external transmission line load in its characteristic impedance through said second impedance branch to absorb reflections from said transmission line load.

Claim 3

A driver circuit for applying a bilevel voltage output signal to the input of a transmission line whose output is coupled to at least one receiver circuit whose input impedance is much greater than the characteristic impedance of said line, said driver circuit comprising: a high speed transistor logic circuit including an output logic circuit; a series network means, one end of said means being connected to said logic output circuit and the other end of said means being connected to said input of said transmission line, said network means including first and second impedance means connected in parallel; and, said series network means being connected to be conditioned by a first level output of said output logic circuit to apply said first voltage level through said first impedance means to said input of said transmission line and said series network means being connected to be conditioned by a second voltage level output of said output logic circuit so as to terminate said line through said second impedance means and said output logic circuit by changing the impedance of said network means so as to absorb reflections from said line produced by said receiver circuit.

Claim 4

A driver circuit for applying a bilevel voltage output signal to the input of a transmission line whose output is coupled to at least one receiver circuit whose input impedance is much greater than the characteristic impedance of said line, said driver circuit comprising: a high speed transistor logic circuit including an output logic circuit; a series network means, one end of said means being connected to said logic output circuit and the other end of said means being connected to said input of said transmission line, said network means including first and second impedance means connected in parallel; and, said series network means being connected to be conditioned by a first level output of said output logic circuit to apply said first voltage level through said first impedance means to said input of said transmission line and said series network means being connected to be conditioned by a second voltage level output of said output logic circuit so as to terminate said line through said second impedance means and said output logic circuit by changing the impedance of said network means so as to absorb reflections from said line produced by said receiver circuit.

Claim 5

The driver circuit according to claim 2 wherein said first and second impedance means respectively include a unidirectional non-linear impedance and a linear impedance and said output logic circuit includes first and second transistors connected in a Darlington circuit having a first output connected to a voltage source and a second output in series with a third transistor connected to a point of reference potential; and said second output being connected to said one end of said network means whereby said first voltage level is established by said Darlington circuit and said second voltage level is established by the conduction of said third transistor.

Claim 6

The driver circuit of claim 1 wherein said circuit is of the transistor-transistor logic type.

Claim 7

The transmission line driver circuit of claim 4 wherein said first impedance branch includes a non-linear impedance and said second impedance branch includes a linear impedance.

Claim 8

The driver circuit of claim 5 wherein said non-linear impedance is an uni-directional element.

Claim 9

The circuit of claim 6 wherein said uni-directional element is a diode.

Claim 10

The circuit of claim 5 wherein said linear impedance is a resistance having a value which approximates the characteristic impedance of said transmission line load.

Claim 11

The circuit of claim 3 wherein said driver output circuit further includes a load impedance connected between said first output and said voltage source.

Claim 12

The circuit of claim 9 wherein said load impedance is a resistance which has a value less than the characteristic impedance of said line, said value being selected to provide a predetermined voltage at currents for driving said line and for short circuit protection, said value together with said non-linear impedance value minimizes reflections from said driver output by providing an impedance whose value approximates the characteristic impedance of said line.

Claim 13

The circuit of claim 2 wherein said first output level applied to said one end of said network means approximates one half the voltage level corresponding to a binary ONE so as to cause said first output level to be doubled in value when received by said receiver circuit and correspond to a full binary ONE.

Claim 14

The circuit of claim 2 wherein said first output level equals said output voltage level, Vout minus the voltage drop Vd across said first impedance means.

Claim 15

A logic transmission line system comprising: a transmission line having an input end, a remote end and a predetermined characteristic impedance; a plurality of receiver logic circuits connected to said line with at least one of said receiver logic circuits being connected to said remote end of said transmission line, each of said receiver logic circuits having an input impedance much greater than said characteristic impedance; a driver logic circuit for producing high and low voltage levels at its output in response to input voltage levels representative of binary ONE and binary ZERO information, said driver logic output circuit including first and second transistors connected in a Darlington circuit arrangement having a first output connected through a load impedance to a voltage source, and a second output connected through the collector-emitter path of a third transistor to a point of reference potential; termination network means, said network means connecting said second output in series with said input end of said transmission line and said network means including at least first and second branches connected in parallel, said first branch having a non-linear impedance element connected to present a low impedance to said high voltage levels and a high impedance to said low voltage levels and said second branch having a linear impedance element; and, said driver logic circuit when switched by one of said input voltage levels being operative to apply said high voltage level through said second darlington circuit output and said non-linear impedance to said input end of said transmission line, said driver logic circuit when switched by the other of said input levels being operative to apply said low voltage level to said network means so as to terminate said transmission line at said input end in its characteristic impedance through said linear impedance element and said third transistor collector-emitter path and absorb reflections from said receiver logic circuit.

Claim 16

A logic transmission line system comprising: a transmission line having an input end, a remote end and a predetermined characteristic impedance; a plurality of receiver logic circuits connected to said line with at least one of said receiver logic circuits being connected to said remote end of said transmission line, each of said receiver logic circuits having an input impedance much greater than said characteristic impedance; a driver logic circuit for producing high and low voltage levels at its output in response to input voltage levels representative of binary ONE and binary ZERO information, said driver logic output circuit including first and second transistors connected in a Darlington circuit arrangement having a first output connected through a load impedance to a voltage source, and a second output connected through the collector-emitter path of a third transistor to a point of reference potential; termination network means, said network means connecting said second output in series with said input end of said transmission line and said network means including at least first and second branches connected in parallel, said first branch having a non-linear impedance element connected to present a low impedance to said high voltage levels and a high impedance to said low voltage levels and said second branch having a linear impedance element; and, said driver logic circuit when switched by one of said input voltage levels being operative to apply said high voltage level through said second darlington circuit output and said non-linear impedance to said input end of said transmission line, said driver logic circuit when switched by the other of said input levels being operative to apply said low voltage level to said network means so as to terminate said transmission line at said input end in its characteristic impedance through said linear impedance element and said third transistor collector-emitter path and absorb reflections from said receiver logic circuit.

Claim 17

The system according to claim 13 wherein said non-linear impedance element is a diode and said first voltage level is of a magnitude which equals one half the voltage level representative of a binary ONE whereby said first voltage level received by said one of said driven logic circuits is doubled in value and corresponds to a full binary ONE.

Claim 18

The system according to claim 13 wherein said driver logic circuit and said driven receiver logic circuits are of the transistor-transistor logic type with one of said receiver logic circuits being connected in common with said driver circuit second output.

Claim 19

The system according to claim 13 wherein said load impedance means is a resistance which has a value less than the characteristic impedance of said line, said value being selected to provide voltage level at said one end of said line which is one half the magnitude of the voltage level representative of a binary ONE at currents for driving said line and said value which when combined with the impedance value of said noN-linear impedance element terminates said line in a value of impedance which prevents reflections.

Claim 20

The system according to claim 16 wherein said transmission line is a twisted pair conductor line.