US3659334A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High power high frequency device
Assignee: RCA Corp
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Filing: 1970-10-13
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Granted: 1972-05-02
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Expires: 1990-10-13
Abstract
Abstract A high power frequency device such as a thyristor or transistor comprises a monolithic body consisting of an emitter assemblage laminated to a base-collector assemblage. The emitter assemblage is a semiconductive wafer of given conductivity type having a plurality of mesas adjacent one surface; a high resistivity ballast layer in each mesa; an insulating film on said one surface and around each mesa; and a layer of high conductivity material, such as heavily doped semiconductive material of opposite conductivity type, on said insulating film over said one surface and surrounding said mesas, the surface of said high conductivity layer being co-planar with the top of said mesas. The base-collector assemblage is a semiconductive wafer which includes at least two layers of mutually opposite conductivity types, the surface of one layer being planar and constituting a major surface of said body.
Inventors
- 👤 Hans W Becke
- 👤 Eric F Cave
- 👤 Daniel Stalnitz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 00:25
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/133; H10D99/00; H10W; H10W40/00; H10W40/10; H10W99/00; H10W72/00; H10W72/50; H10W72/531; H10W72/5363; Y; Y10; Y10S; Y10S148/00; Y10S148/049; Y10S148/085; Y10S148/122
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
98 words
The method of fabricating a seMiconductor device comprising; forming a plurality of mesas on one surface of a first semiconductive wafer; forming an electrically insulating film on said one surface and on each said mesa; depositing a layer of high conductivity material on said insulating film; removing a surface portion of said high conductivity layer to expose the tops of said mesa; positioning on said high conductivity layer a second semiconductive wafer which includes at least two layers of mutually opposite conductivity types; and, laminating said first wafer to said second wafer to form a monolithic semiconductive body.
Claim 2
Independent Claim
98 words
The method of fabricating a seMiconductor device comprising; forming a plurality of mesas on one surface of a first semiconductive wafer; forming an electrically insulating film on said one surface and on each said mesa; depositing a layer of high conductivity material on said insulating film; removing a surface portion of said high conductivity layer to expose the tops of said mesa; positioning on said high conductivity layer a second semiconductive wafer which includes at least two layers of mutually opposite conductivity types; and, laminating said first wafer to said second wafer to form a monolithic semiconductive body.
Claim 3
Independent Claim
119 words
The method of fabricating a semiconductor device comprising: forming a plurality of mesas on one surface of a first semiconductive wafer of given conductivity type; forming an electrically insulating film on said one surface and on each said mesa; depositing on said insulating film a layer of high conductivity polycrystalline semiconductive material of conductivity type opposite to said given conductivity type; removing a surface portion of said high conductivity layer to expose the tops of said mesas; positioning on said high conductivity layer a second semiconductive wafer which includes at least two layers of mutually opposite conductivity types; laminating said first wafer to said second wafer to form a monolithic semiconductive body; and, attached electrical leads to said body.
Claim 4
Independent Claim
119 words
The method of fabricating a semiconductor device comprising: forming a plurality of mesas on one surface of a first semiconductive wafer of given conductivity type; forming an electrically insulating film on said one surface and on each said mesa; depositing on said insulating film a layer of high conductivity polycrystalline semiconductive material of conductivity type opposite to said given conductivity type; removing a surface portion of said high conductivity layer to expose the tops of said mesas; positioning on said high conductivity layer a second semiconductive wafer which includes at least two layers of mutually opposite conductivity types; laminating said first wafer to said second wafer to form a monolithic semiconductive body; and, attached electrical leads to said body.
Claim 5
Dependent Claim
28 words
The method as in claim 2, wherein said first given conductivity type wafer comprises a layer of high resistivity material between two surface layers of low resistivity material.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-05-02 | 1975-11-01 | 1976-05-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-05-02 | 1979-11-01 | 1980-05-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-05-02 | 1983-11-01 | 1984-05-02 | $7700.00 | Window Closed / Lapsed |