US3659210A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Phase detection circuit
Assignee: Telefonaktiebolaget LM Ericsson AB
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Filing: 1970-10-26
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Granted: 1972-04-25
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Expires: 1990-10-26
Abstract
Abstract Phase detection circuit, which in the state of a voltage value indicates the difference between the phase of an incoming signal and the phase of a reference signal. The circuit is built up by an operational amplifier with two inputs, one of them inverting the phase of the incoming signal. The incoming signal is fed to both inputs of the amplifier, whereby the signal is fed to the not inverting input via a switch which is controlled by the reference signal in such a manner that it alternatively lets through and blocks up the incoming signal during every other half period of the reference signal. The amplifier is so dimensioned that the amplification of signals fed to the inverting input is as high or lower than the amplification of signals fed to the other input.
Inventors
- 👤 Nils Lennart Nilsson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 11:39
CPC Classifications
H; H03; H03D; H03D13/00; H03D13/007; H03D13/008
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
259 words
Phase detection circuit with an input (16) and an output (14), which circuit in the state of a voltage value indicates the difference between the phase of an incoming signal and the phase of a reference signal, comprising a differential amplifier (11) with two inputs (12,13) to which The incoming signal is indicated to be fed depending on the reference signal (Ref), whereby the differential amplifier is arranged to phase invert the signal fed to the one input (12), after which the phase inverted signal is added to the not phase inverted signal fed to the other input (13), so that on the output (14) of the differential amplifier (11) an output signal is obtained, which is a measure of the phase shift of the incoming signal in comparison with the reference signal (Ref), and in which circuit said one input (12) of the differential amplifier (11) is connected direct to the input (16) of the phase detection circuit, while said other input (13) of the differential amplifier (11) is connected to the input (16) of the phase detection circuit via a switch (15) which is controlled by the reference signal (Ref) in such a manner that it alternatively lets through and blocks up the incoming signal during every other half period of the reference signal (Ref), whereby the differential amplifier (11) is dimensioned in such a manner, that the amplification of signals fed to said one input (12) is as high or lower than the amplification of signals fed to said switch (15) and said other input (13).
Claim 2
Dependent Claim
259 words
Phase detection circuit with an input (16) and an output (14), which circuit in the state of a voltage value indicates the difference between the phase of an incoming signal and the phase of a reference signal, comprising a differential amplifier (11) with two inputs (12,13) to which The incoming signal is indicated to be fed depending on the reference signal (Ref), whereby the differential amplifier is arranged to phase invert the signal fed to the one input (12), after which the phase inverted signal is added to the not phase inverted signal fed to the other input (13), so that on the output (14) of the differential amplifier (11) an output signal is obtained, which is a measure of the phase shift of the incoming signal in comparison with the reference signal (Ref), and in which circuit said one input (12) of the differential amplifier (11) is connected direct to the input (16) of the phase detection circuit, while said other input (13) of the differential amplifier (11) is connected to the input (16) of the phase detection circuit via a switch (15) which is controlled by the reference signal (Ref) in such a manner that it alternatively lets through and blocks up the incoming signal during every other half period of the reference signal (Ref), whereby the differential amplifier (11) is dimensioned in such a manner, that the amplification of signals fed to said one input (12) is as high or lower than the amplification of signals fed to said switch (15) and said other input (13).
Claim 3
Dependent Claim
34 words
Phase detection circuit according to claim 1, in which the amplification of signals fed to said one input (12) is half as high as the amplification of signals fed to said other input (13).
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-04-25 | 1975-10-25 | 1976-04-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-04-25 | 1979-10-25 | 1980-04-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-04-25 | 1983-10-25 | 1984-04-25 | $7700.00 | Window Closed / Lapsed |