US3656003A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sense amplifier for computer memory operating under high speed cycle times
Assignee: Unisys Corp
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Filing: 1970-07-10
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Granted: 1972-04-11
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Expires: 1990-07-10
Abstract
Abstract This invention relates to a sense amplifier circuit for use with a memory element of a high speed computer which does not become saturated during its write cycle by high frequency transient noises. Low frequency noises generated during the computer write cycle are also rejected during an immediately following read cycle so that memory output is passed through the amplifier. In addition, the sense amplifier arrangement includes circuitry whereby the write (i.e., bit) current driving voltage for recording information into the memory is substantially reduced.
Inventors
- 👤 Chung-Ho Chen
- 👤 Roy D Thomas
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 03:08
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/02
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
127 words
A sensing circuit comprising: a. first and second differential amplifiers; b. a memory for storing information; c. means utilized in cooperation with said memory for reading out and writing in information therein; d. means connected intermediate said first amplifier and said memory as well as said last mentioned means for preventing the saturation of said first amplifier by a high frequency noise signal occurring during said writing in of information into said memory; e. means further connected intermediate said first and second amplifier for blocking a high frequency noise signal in said writing mode, and a low frequency noise signal in said reading out mode, said means further passing a high frequency read-out signal from said memory to said second amplifier during said second mode of operation.
Claim 2
Dependent Claim
127 words
A sensing circuit comprising: a. first and second differential amplifiers; b. a memory for storing information; c. means utilized in cooperation with said memory for reading out and writing in information therein; d. means connected intermediate said first amplifier and said memory as well as said last mentioned means for preventing the saturation of said first amplifier by a high frequency noise signal occurring during said writing in of information into said memory; e. means further connected intermediate said first and second amplifier for blocking a high frequency noise signal in said writing mode, and a low frequency noise signal in said reading out mode, said means further passing a high frequency read-out signal from said memory to said second amplifier during said second mode of operation.
Claim 3
Dependent Claim
17 words
A sensing circuit in accordance with claim 1 wherein said memory comprises a plated wire memory element.
Claim 4
Dependent Claim
20 words
A sensing circuit in accordance with claim 2 wherein said means cooperating with said memory comprises a noise cancelling wire.
Claim 5
Dependent Claim
28 words
A sensing circuit in accordance with claim 1 wherein a voltage splitter circuit is further connected to the input of said first mentioned intermediate means and said memory.
Claim 6
Dependent Claim
18 words
A sensing circuit in accordance wit claim 4 wherein said splitter circuit comprises two pairs of matched diodes.
Claim 7
Dependent Claim
19 words
A sensing circuit in accordance with claim 1 wherein said first mentioned intermediate means comprises a signal clamping circuit.
Claim 8
Dependent Claim
33 words
A sensing circuit in accordance with claim 6 wherein said clamping circuit is comprised of two diode matched pairs, certain of said diode pairs conducting current during the write mode of said memory.
Claim 9
Dependent Claim
32 words
A sensing circuit in accordance with claim 1 wherein said second intermediate connected means comprises a signal blocking means during said write mode and a high pass filter during said read mOde.
Claim 10
Dependent Claim
35 words
A sensing circuit in accordance with claim 8 wherein said blocking means comprises an RC circuit having a low time constant, and said high pass filter comprises an RC circuit having a higher time constant.
Claim 11
Dependent Claim
19 words
A sensing circuit in accordance with claim 1 wherein a voltage restorer circuit is interposed between said differential amplifiers.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-04-11 | 1975-10-11 | 1976-04-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-04-11 | 1979-10-11 | 1980-04-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-04-11 | 1983-10-11 | 1984-04-11 | $7700.00 | Window Closed / Lapsed |