Semiconductor device having an integrated pulse gate circuit and method of manufacturing said device

Claim 1

A semiconductor device having an integrated semiconductor circuit comprising at least one pulse gate, said pulse gate comprising a semiconductor body having a surface which is at least partly covered with an insulating layer and having a first region of a first conductivity type adjoining the surface, a first connection conductor conductively contacting the first region, an island-shaped region of a second conductivity type adjoining the surface and fully surrounded within the semiconductor body by the first region to form a first p-n junction therewith, a second connection conductor conductively contacting the island-shaped region, a surface zone of the first conductivity type within the semiconductor body and fully surrounded by the island-shaped region to form a second P-N junction therewith, a pair of plates forming a capacitor, said surface zone forming one plate of said capacitor, a third connection conductor making conductive contact with the surface zone to form a pulse output terminal, a resistor having one end connected to the third connection conductor, a pulse input terminal connected to the other end of the resistor, a trigger input terminal connected to the other plate of said capacitor, means to apply a potential difference between said first and second connection conductors, means to apply an input pulse signal to said pulse input terminal, and means to apply a trigger pulse signal to said trigger input terminal, said pulse output terminal providing an output pulse signal for a predetermined relationship between said potential difference, the amplitude of said input pulse signal, and the amplitude of said trigger pulse signal.