A.c. signal logic circuit

Claim 2

A circuit arrangement for realizing logic functions by means of the dynamic linkage of alternating voltage type binary input signals comprising: at least one inPut circuit for said circuit arrangement with each input including a separate input transformer and a rectifier connected to the secondary of said input transformer; a single blocking oscillator circuit including a transformer, means for connecting the voltage appearing at the output of each of said input circuits to said blocking oscillator circuit as the supply and control voltages thereof whereby the pulse voltage oscillations of said blocking oscillator circuit are controlled by the rectified voltages resulting from A.C. input signals applied to said input circuits; a single output terminal for said circuit arrangement; and an amplifier stage connected to the output secondary winding of said blocking oscillator transformer for feeding the pulse voltage output of said blocking oscillator to said output terminal.

Claim 3

The circuit arrangement as defined in claim 1 wherein said circuit arrangement includes a plurality of said input circuits.

Claim 4

The circuit arrangement as defined in claim 1 wherein each of said input circuits includes an inductance connected in series with said rectifier.

Claim 5

The circuit arrangement as defined in claim 1 wherein said blocking oscillator transformer has a pair of primary windings and wherein said blocking oscillator circuit further includes a transistor having a first of said primary windings connected in its collector circuit and the other of said primary windings connected to its base.

Claim 6

The circuit arrangement as defined in claim 4 wherein said circuit arrangement has two of said input circuits, one of which is connected in series with said first primary winding and the other of which is connected in series with said other primary winding, whereby said circuit arrangement is an AND gate.

Claim 7

The circuit arrangement as defined in claim 4 wherein said circuit arrangement has a plurality of said input circuits, the outputs of which are connected to a common point and in series with said first primary winding; said common terminal being further connected to said base of said transistor via a resistor and said other primary winding, whereby said circuit arrangement is an OR gate.

Claim 8

A circuit arrangement for realizing logic functions by means of the dynamic linkage of alternating voltage type binary input signals comprising: a single input circuit for said circuit arrangement including an input transformer, a rectifier connected to the secondary of said input transformer, a source of D.C. potential, and a voltage divider, consisting of a resistor and said rectifier, connected in series with said source of potential and said secondary winding of said input transformer; a single blocking oscillator circuit including a transformer having a pair of primary windings and a transistor having a first of said primary windings connected in its collector circuit and the other of said primary windings connected to its base, the control voltages for controlling said blocking oscillator circuit being taken from said voltage divider by connecting said primary windings of said blocking oscillator transformer thereto in a manner whereby the pulse voltage oscillations of said blocking oscillator are controlled by the rectified A.C. input signal applied to said input circuit whereby said circuit arrangement is a NOT circuit; a single output terminal for said circuit arrangement; and an amplifier stage connected to the output secondary winding of said blocking oscillator transformer for feeding the pulse voltage output of said blocking oscillator to said output terminal.

Claim 9

A circuit arrangement for realizing logic functions by means of the dynamic linkage of alternating voltage type binary input signals comprising: a single input circuit for said circuit arrangement including an input transformer, a rectifier connected to the secondary of said input transformer, a source of D.C. potential, and a voltage divider, consisting of a resistor and said rectifier, connected in series with said source of potential and said secondary winding of said input transformer; a single blocking oscillator circuit including a transformer having a pair of primary windings and a transistor having a first of said primary windings connected in its collector circuit and the other of said primary windings connected to its base, the control voltages for controlling said blocking oscillator circuit being taken from said voltage divider by connecting said primary windings of said blocking oscillator transformer thereto in a manner whereby the pulse voltage oscillations of said blocking oscillator are controlled by the rectified A.C. input signal applied to said input circuit whereby said circuit arrangement is a NOT circuit; a single output terminal for said circuit arrangement; and an amplifier stage connected to the output secondary winding of said blocking oscillator transformer for feeding the pulse voltage output of said blocking oscillator to said output terminal.

Claim 10

The circuit arrangement as defined in claim 7 wherein said first primary winding of said blocking oscillator transformer is connected to said source of D.C. potential and said other primary winding is connected between the base of said transistor and the junction of said resistor and said rectifier.

Claim 11

The circuit arrangement as defined in claim 4 wherein said circuit arrangement has two of said input circuits, oNe of which is connected in series with said first primary winding and the other of which is connected in series with said other primary winding; and wherein said circuit arrangement further includes means for feeding back the collector circuit voltage to the base circuit of said transistor in order to maintain the supply voltage thereto, whereby said circuit arrangement operates as a memory circuit with said two input circuits comprising set and reset inputs respectively.

Claim 12

The circuit arrangement as defined in claim 1 including further circuit means for adapting the dynamic output signals from said circuit arrangement for use by D.C. coupled logic, said further circuit means comprising: a transformer having its input connected to said output terminal and its secondary winding connected in series with a rectifier and the control electrode of a transistor-resistor negating stage, whereby said further circuit arrangement converts the dynamic input signals thereto to static signals at the output of said negating transistor-resistor stage.