US3653003A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Apparatus for identifying those means of a plurality of means which have changed state
Assignee: Telefonaktiebolaget LM Ericsson AB
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Filing: 1970-05-01
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Granted: 1972-03-28
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Expires: 1990-05-01
Abstract
Abstract Apparatus for identifying those means of a plurality of means which have changed their binary state. A reference is sequentially obtained to only those means which have changed their state without spending unnecessary work sifting off the remaining means. The arrangement is particularly applicable in telecommunication systems, more especially such systems which have a central control, e.g., program store controlled systems in which the arrangement makes it possible to reduce considerably the idle load of a controlling computer.
Inventors
- 👤 Goran Anders Henrik Hemdal
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 12:47
CPC Classifications
H; H04; H04Q; H04Q3/00; H04Q3/42; H04Q3/54; H04Q3/545
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
345 words
Apparatus for identifying in a plurality of conductors capable of having either one of two states those conductors that are in said plurality which have changed state subsequent to a previous identification, said apparatus comprising: a plurality of memory circuits, each of said memory circuits being associated with a different conductor for generating at an output either a 1 signal or a 0 signal in accordance with the state of the associated conductor, each of said memory circuits including switching means responsive to a control signal for terminating a 1 signal at the memory circuit output; a plurality of identification circuits each associated with a different one of said conductors for generating as identity number assigned to the associated conductor as a coded combination of signals, each of said idEntification circuits having a cascade input terminal, a cascade output terminal and a diode interconnecting said terminals; means for connecting the cascade output terminal of one identification circuit to the cascade input terminal of another identification circuit whereby said identification circuits are connected in cascade via said diodes, each of said identification circuits including a two-input logic circuit for generating one of said coded combination signals when activated, one of the inputs of said logic circuit being connected to the cascade input terminal of its identification circuit, the other of the inputs of said logic circuit being connected to its cascade output terminal of its identification circuit and to the output of its associated memory circuit, said logic circuit being activated only when said one input receives a 0 signal and said other input receives a 1 signal whereby only one of the logic circuits can be activated at one time and said logic circuit when activated including means for transmitting a control signal to the switching means of its associated memory circuit whereby the output of said memory circuit transmits a 0 signal via the cascade output terminal of its identification circuit to the cascade input terminal of all following identification circuits up to an identification circuit whose associated memory circuit transmits a 1 signal.
Claim 2
Dependent Claim
345 words
Apparatus for identifying in a plurality of conductors capable of having either one of two states those conductors that are in said plurality which have changed state subsequent to a previous identification, said apparatus comprising: a plurality of memory circuits, each of said memory circuits being associated with a different conductor for generating at an output either a 1 signal or a 0 signal in accordance with the state of the associated conductor, each of said memory circuits including switching means responsive to a control signal for terminating a 1 signal at the memory circuit output; a plurality of identification circuits each associated with a different one of said conductors for generating as identity number assigned to the associated conductor as a coded combination of signals, each of said idEntification circuits having a cascade input terminal, a cascade output terminal and a diode interconnecting said terminals; means for connecting the cascade output terminal of one identification circuit to the cascade input terminal of another identification circuit whereby said identification circuits are connected in cascade via said diodes, each of said identification circuits including a two-input logic circuit for generating one of said coded combination signals when activated, one of the inputs of said logic circuit being connected to the cascade input terminal of its identification circuit, the other of the inputs of said logic circuit being connected to its cascade output terminal of its identification circuit and to the output of its associated memory circuit, said logic circuit being activated only when said one input receives a 0 signal and said other input receives a 1 signal whereby only one of the logic circuits can be activated at one time and said logic circuit when activated including means for transmitting a control signal to the switching means of its associated memory circuit whereby the output of said memory circuit transmits a 0 signal via the cascade output terminal of its identification circuit to the cascade input terminal of all following identification circuits up to an identification circuit whose associated memory circuit transmits a 1 signal.
Claim 3
Dependent Claim
39 words
The arrangement of claim 1 and further comprising an indicator circuit connected to one end of the cascaded series of diodes to generate a 1 signal as long as a 1 signal is applied to any cascade input terminal.
Claim 4
Dependent Claim
42 words
The apparatus of claim 1 wherein each of said memory circuits includes a pulse counting register delay means operable to delay the activation of the memory circuit for a period of time after a particular change of state of the associated conductor.
Claim 5
Dependent Claim
22 words
Apparatus according to claim 1 wherein the state of a conductor is dependent on the state of a two-state device connected thereto.
Claim 6
Dependent Claim
73 words
Apparatus according to claim 4 wherein each memory circuit comprises a first bistable circuit having an output connected to the output of the memory circuit and an input, a two-input logic circuit having an output connected to the input of said first bistable circuit, the first input of said logic circuit being connected to the associated conductor, and means for applying a further control signal to the other input of said logic circuit.
Claim 7
Dependent Claim
30 words
Apparatus according to claim 5 wherein a resistor-capacitor circuit connects said first input to said associated conductor so that only signals having a predetermined duration can activate said logic circuit.
Claim 8
Dependent Claim
123 words
The apparatus according to claim 5 wherein said switching means in each memory circuit comprises a second bistable circuit which is activated by said control signal from the associated identification circuit, a further logic circuit connected to said first and second bistable circuits for controlling the transmission of a 1 signal or a 0 signal from the output of the associated memory circuit in accordance with predetermined states of said bistable circuits, an indicating means associated with each memory circuit and the identification circuit associated therewith and connected to the first bistable circuit of said memory circuit and to the logic circuit of said identification circuit for giving an indication when said identification circuit is activated and the conductor associated therewith changes state.
Claim 9
Dependent Claim
96 words
The apparatus of claim 7 wherein each of said first bistable circuits includes a self-cleaning means responsive to a clear signal, each of said second bistable circuits includes a conditional activating means connected to receive the control signal from the associated identification circuit, and a computer having a first clear signal output connected to all of said self-cleaning means, an activating signal output connected to each of said conditional activating means, said computer further having a plurality of signal inputs for receiving the coded combinations of signals representing identity numbers from all of said identification circuits.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-03-28 | 1975-09-27 | 1976-03-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-03-28 | 1979-09-27 | 1980-03-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-03-28 | 1983-09-27 | 1984-03-28 | $7700.00 | Window Closed / Lapsed |