US3652906A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Mosfet decoder topology
Assignee: Individual
•
Filing: 1970-03-24
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Granted: 1972-03-28
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Expires: 1990-03-24
Abstract
Abstract The internal capacitance of parallel-gate IGFET structures such as FARMOST NOR gates is substantially reduced by giving the gated area of the substrate a U-shaped configuration so that each gate electrode extends from one leg of the source or drain diffusion to the other leg of the same diffusion across the other diffusion and two gated substrate areas, forming in effect a pair of parallel-connected IGFETS. The reduced capacitance permits the use of much smaller devices requiring much less drive current for the same output current.
Inventors
- 👤 Alton O Christensen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 13:07
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/124; H10D62/126; H10D30/00; H10D30/60; H10D30/611; H10D30/637; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/83125
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
122 words
A low-capacitance IGFET structure, comprising: a. substrate means including a semiconductor material having a first polarity; b. source and drain diffused regions having the opposite polarity formed in said substrate means; c. a plurality of separate metallic gate electrode means overlaid over portions of said substrate means and diffusions, but electrically separated therefrom by an insulating layer; d. one of said source and drain diffused regions including a pair of interconnected but spaced diffused regions; the other of said source and drain diffused regions including a single diffused region positioned between said spaced diffused regions; and each of said separate gate electrode means being positioned to extend across said single diffused region from one of said spaced diffused regions to the other.
Claim 2
Dependent Claim
122 words
A low-capacitance IGFET structure, comprising: a. substrate means including a semiconductor material having a first polarity; b. source and drain diffused regions having the opposite polarity formed in said substrate means; c. a plurality of separate metallic gate electrode means overlaid over portions of said substrate means and diffusions, but electrically separated therefrom by an insulating layer; d. one of said source and drain diffused regions including a pair of interconnected but spaced diffused regions; the other of said source and drain diffused regions including a single diffused region positioned between said spaced diffused regions; and each of said separate gate electrode means being positioned to extend across said single diffused region from one of said spaced diffused regions to the other.
Claim 3
Dependent Claim
125 words
A low-capacitance IGFET parallel-gate structure, comprising: a. substrate means including a semiconductor material having a first polarity; b. source and drain diffused regions having the opposite polarity formed in said substrate means; c. a plurality of separate spaced metallic gate electrodes overlying portions of said substrate means and diffused regions but electrically separated therefrom by an insulating layer; d. one of said diffused regions being in the form of a first elongated strip; the other diffused region being in the form of a pair of second interconnected elongated strips positioned one on each side of said first strip and generally parallel thereto; and each of said separate gate electrodes extending generally transversely across said first strip fron one of said second strips to the other.--
Claim 4
Dependent Claim
125 words
A low-capacitance IGFET parallel-gate structure, comprising: a. substrate means including a semiconductor material having a first polarity; b. source and drain diffused regions having the opposite polarity formed in said substrate means; c. a plurality of separate spaced metallic gate electrodes overlying portions of said substrate means and diffused regions but electrically separated therefrom by an insulating layer; d. one of said diffused regions being in the form of a first elongated strip; the other diffused region being in the form of a pair of second interconnected elongated strips positioned one on each side of said first strip and generally parallel thereto; and each of said separate gate electrodes extending generally transversely across said first strip fron one of said second strips to the other.--
Claim 5
Dependent Claim
150 words
A low-capacitance IGFET NOR-gate structure, comprising: a. substrate means including a semiconductor material having a first polarity; b. source and drain diffused regions having the opposite polarity formed in said substrate means; c. a plurality of separate spaced metallic gate electrodes overlying portions of said substrate means and diffused regions but electrically separated therefrom by an insulating layer; d. one of said diffused regions being in the form of a first elongated strip; the other diffused region being in the form of a pair of second interconnected elongated strips positioned one on each side of said first strip and generally parallel thereto; and each of said separate gate electrodes extending generally transversely across said first strip from one of said second strips to the other; e. one of said gate electrodes being electrically connected to said second strips; and f. metallic output connection means electrically connected to said first strip.
Claim 6
Dependent Claim
150 words
A low-capacitance IGFET NOR-gate structure, comprising: a. substrate means including a semiconductor material having a first polarity; b. source and drain diffused regions having the opposite polarity formed in said substrate means; c. a plurality of separate spaced metallic gate electrodes overlying portions of said substrate means and diffused regions but electrically separated therefrom by an insulating layer; d. one of said diffused regions being in the form of a first elongated strip; the other diffused region being in the form of a pair of second interconnected elongated strips positioned one on each side of said first strip and generally parallel thereto; and each of said separate gate electrodes extending generally transversely across said first strip from one of said second strips to the other; e. one of said gate electrodes being electrically connected to said second strips; and f. metallic output connection means electrically connected to said first strip.
Claim 7
Dependent Claim
26 words
The NOR-gate structure of claim 3, in which the inter-connection between said second strips is connected in the circuit of the NOR-gate as the clock bus.
Claim 8
Dependent Claim
50 words
The NOR-gate structure of claim 4, in which the inter-connection between said second strips is a diffused region extending transversely between said second strips, said interconnection being spaced from one end of said first strip so that the substrate area separating said source and drain diffused regions is generally U-shaped.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-03-28 | 1975-09-27 | 1976-03-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-03-28 | 1979-09-27 | 1980-03-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-03-28 | 1983-09-27 | 1984-03-28 | $7700.00 | Window Closed / Lapsed |