US3649769A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for supplying direct current to a telephone line
Assignee: General Electric Co
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Filing: 1970-10-28
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Granted: 1972-03-14
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Expires: 1990-10-28
Abstract
Abstract Two PNP transistors are coupled between the positive pole of a direct current source and one side of a telephone line, and two NPN transistors are coupled between the negative pole of the direct current source and the other side of the telephone line. The transistors are provided with circuits to control the direct current supplied to the telephone line. The transistors present a high impedance to voice frequency and alternating current signals on the telephone line, and thus provide the desired current without large inductors.
Inventors
- 👤 Jurgen Pest
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 16:29
CPC Classifications
H; H04; H04M; H04M19/00; H04M19/001; H04M19/005; H04Q; H04Q2213/00; H04Q2213/1308; H04Q2213/13082; H04Q2213/13305
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
378 words
An improved circuit for supplying direct current to a telephone line that carries voice frequency or alternating current signals comprising: a. a positive terminal and a negative terminal for respective connection to the positive pole and the negative pole of a source of direct current; b. a first terminal and a second terminal for respective connection to the two sides of a telephone line; c. first and second PNP-type transistors each having an emitter, a base, and a collector; d. first and second NPN-type transistors each having an emitter, a base, and a collector; e. first and second current-limiting resistors of substantially equal magnitude; f. first and second bias resistors of substantially equal magnitude; g. third and fourth bias resistors of substantially equal magnitude; h. first and second capacitors of substantially equal magnitude; i. means connecting said collector of said first PNP transistor to said first terminal; j. means connecting said first current-limiting resistor between said emitter of said first PNP transistor and said positive terminal; k. Means connecting said collector of said second PNP transistor to said first terminal; l. means connecting said emitter of said second PNP transistor to said base of said first PNP transistor; m. means connecting said first and third bias resistors in series between said positive terminal and said first terminal; n. means connecting the junction of said first and third bias resistors to said base of said second PNP transistor; o. means connecting said first capacitor between said base of said second PNP transistor and said positive terminal; p. means connecting said collector of said first NPN transistor to said second terminal; q. means connecting said second current-limiting resistor between said emitter of said first NPN transistor and said negative terminal; r. means connecting said collector of said second NPN transistor to said second terminal; s. means connecting said emitter of said second NPN transistor to the base of said first NPN transistor; t. means connecting said second and fourth bias resistors in series between said negative terminal and said second terminal; u. means connecting the junction of said second and fourth bias resistors to said base of said second NPN transistor; v. and means connecting said second capacitor between said base of said second NPN transistor and said negative terminal.
Claim 2
Dependent Claim
378 words
An improved circuit for supplying direct current to a telephone line that carries voice frequency or alternating current signals comprising: a. a positive terminal and a negative terminal for respective connection to the positive pole and the negative pole of a source of direct current; b. a first terminal and a second terminal for respective connection to the two sides of a telephone line; c. first and second PNP-type transistors each having an emitter, a base, and a collector; d. first and second NPN-type transistors each having an emitter, a base, and a collector; e. first and second current-limiting resistors of substantially equal magnitude; f. first and second bias resistors of substantially equal magnitude; g. third and fourth bias resistors of substantially equal magnitude; h. first and second capacitors of substantially equal magnitude; i. means connecting said collector of said first PNP transistor to said first terminal; j. means connecting said first current-limiting resistor between said emitter of said first PNP transistor and said positive terminal; k. Means connecting said collector of said second PNP transistor to said first terminal; l. means connecting said emitter of said second PNP transistor to said base of said first PNP transistor; m. means connecting said first and third bias resistors in series between said positive terminal and said first terminal; n. means connecting the junction of said first and third bias resistors to said base of said second PNP transistor; o. means connecting said first capacitor between said base of said second PNP transistor and said positive terminal; p. means connecting said collector of said first NPN transistor to said second terminal; q. means connecting said second current-limiting resistor between said emitter of said first NPN transistor and said negative terminal; r. means connecting said collector of said second NPN transistor to said second terminal; s. means connecting said emitter of said second NPN transistor to the base of said first NPN transistor; t. means connecting said second and fourth bias resistors in series between said negative terminal and said second terminal; u. means connecting the junction of said second and fourth bias resistors to said base of said second NPN transistor; v. and means connecting said second capacitor between said base of said second NPN transistor and said negative terminal.
Claim 3
Dependent Claim
45 words
The improved circuit of claim 1 wherein the beta of said first PNP transistor is substantially equal to the beta of said first NPN transistor, and wherein the beta of said second PNP transistor is substantially equal to the beta of said second NPN transistor.
References Cited (Backward Citations)
SU125817A1
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-03-14 | 1975-09-13 | 1976-03-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-03-14 | 1979-09-13 | 1980-03-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-03-14 | 1983-09-13 | 1984-03-14 | $7700.00 | Window Closed / Lapsed |