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US3648097A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital cathode-ray tube linearity corrector

Assignee: Texas Instruments Inc
•
Filing: 1969-12-01
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Granted: 1972-03-07
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Expires: 1989-12-01
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Abstract

Abstract A system for correcting the signals transmitted to the deflection yokes of a cathode-ray tube employs digital means to produce an undistorted linear display while requiring a minimum of adjustments. Basically, the system utilizes digital circuitry to produce a correction factor from digital X- and Y-coordinate data supplied by a digital computer. This correction factor, which is equivalent to the sum of the squares of the X- and Ycoordinate data, is converted into an analog signal, along with the coordinate data, by digital to analog converters. The analog correction signal is multiplied by and then added to the analog coordinate signals, thereby producing the corrected deflection signals for an undistorted linear display on the essentially flat face of the tube. An analog correction signal may also be utilized to correct the focus of the electron beam on the tube face.

Inventors

  • 👤 Jerry Dale Merryman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 08:20
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/26; G06G7/28; G09; G09G; G09G1/00; G09G1/04; H; H04; H04N; H04N3/00; H04N3/10; H04N3/16; H04N3/22; H04N3/23; H04N3/233; H04N3/2335

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 113 words
In an analog display system, a digital linearity corrector comprising: a. analog display means for displaying analog signals; b. binary circuit means for generating binary coordinate data representing analog signals which are to be displayed by said analog display means; c. binary correction means coupled to said binary circuit means for generating a binary linearity correction factor as a function of the binary coordinate data; and d. binary-to-analog conversion means coupling said binary circuit means and said binary correction means to said analog display means for converting the binary coordinate data and the binary linearity correction factor to corrected analog deflection signals for said analog display means thereby producing an undistorted linear display.
Claim 2
Dependent Claim 113 words
In an analog display system, a digital linearity corrector comprising: a. analog display means for displaying analog signals; b. binary circuit means for generating binary coordinate data representing analog signals which are to be displayed by said analog display means; c. binary correction means coupled to said binary circuit means for generating a binary linearity correction factor as a function of the binary coordinate data; and d. binary-to-analog conversion means coupling said binary circuit means and said binary correction means to said analog display means for converting the binary coordinate data and the binary linearity correction factor to corrected analog deflection signals for said analog display means thereby producing an undistorted linear display.
Claim 3
Dependent Claim 43 words
The digital linearity corrector of claim 1 wherein said binary correction means is comprised of means for generating the sum of the squares of said binary coordinate data to provide the binary linearity correction factor as a function of said binary coordinate data.
Claim 4
Dependent Claim 19 words
The digital linearity corrector of claim 1 wherein said binary circuit means produces binary X- and Y-coordinate coordinate data.
Claim 5
Dependent Claim 37 words
The digital linearity corrector of claim 1 wherein the analog display means is coupled to said conversion means by amplifier means for increasing the strength of said corrected analog deflection signals transmitted to said analog display means.
Claim 6
Dependent Claim 33 words
The digital linearity corrector of claim 1 wherein said analog display means includes analog deflection means for deflecting a display on said analog display means in accordance with said corrected analog deflection signals.
Claim 7
Dependent Claim 21 words
The digital linearity corrector of claim 5 including compensation means for compensating for any distortion created by said analog deflection means.
Claim 8
Dependent Claim 55 words
The digital linearity corrector of claim 1 wherein said analog display means is comprised of: an electron beam cathode-ray tube; and analog deflection means for deflecting the electron beam across the face of said tube in accordance with said corrected analog deflection signals thereby producing an undistorted linear display on the face of said tube.
Claim 9
Dependent Claim 53 words
The digital linearity corrector of claim 3 wherein said binary correction means is comprised of: squarer means for digitally separately squaring the X- and the Y-coordinate data; adder means for digitally summing the squares of the X- and Y-coordinate data; and control means for routing the flow of digital information through the system.
Claim 10
Dependent Claim 36 words
The digital linearity corrector of claim 9 wherein said control means is comprised of: counter means for sequentially routing the flow of digital information through the system; and clock means for periodically operating said counter means.
Claim 11
Dependent Claim 33 words
The digital linearity corrector of claim 7 including means for correcting the focus of the electron beam on the face of the cathode-ray tube coupled between the conversion means and said cathode-ray tube.

References Cited (Backward Citations)

US3341735A Cited
US3435278A Cited
US3422305A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-03-07 1975-09-06 1976-03-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-03-07 1979-09-06 1980-03-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-03-07 1983-09-06 1984-03-07 $7700.00 Window Closed / Lapsed

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