Program store error detection arrangements for switching systems

Claim 2

In a data processor having a store comprising a group of items including a plurality of linked item lists, a method for initializing a distinct item linked to said plurality of lists comprising the steps of: disassociating said distinct item from said plurality of linked item lists, altering said distinct item to ineffectuate processing references thereto, isolating said distinct item in said store for a predetermined time, deleting store references to said distinct item during said predetermined time, and modifying said distinct item to correspond to a preassigned state at the end of said predetermined time.

Claim 3

In a data processor having a store comprising a plurality of items including a group of selectively linked items and a plurality of linked item lists, and means for detecting items in error, a method for initializing a detected item linked to said group of selectively linked items and to said plurality of linked item lists comprising the steps of: unlinking said detected item from said plurality of linked item lists, altering said detected item to ineffectuate processing references thereto, checking the other selectively linked items for errors in said detecting means, if an error is detected in said other selectively linked items, unlinking said other selectively linked items from said detected item, isolating said detected item in said store for a predetermined time, deleting store item references to said detected item during said predetermined time, if an error is detected in the checking of said other selectively linked items modifying said detected item to correspond to a preassigned state at the end of said predetermined time, and if an error is not detected in the checking of said other selected linked items modifying said selectively linked items to correspond to preassigned states at the end of said predetermined time.

Claim 4

In a data processor having a store comprising a plurality of items including a group of selectively linked items and a plurality of linked item lists, and means for detecting items in error, a method for initializing a detected item linked to said group of selectively linked items and to said plurality of linked item lists comprising the steps of: unlinking said detected item from said plurality of linked item lists, altering said detected item to ineffectuate processing references thereto, checking the other selectively linked items for errors in said detecting means, if an error is detected in said other selectively linked items, unlinking said other selectively linked items from said detected item, isolating said detected item in said store for a predetermined time, deleting store item references to said detected item during said predetermined time, if an error is detected in the checking of said other selectively linked items modifying said detected item to correspond to a preassigned state at the end of said predetermined time, and if an error is not detected in the checking of said other selected linked items modifying said selectively linked items to correspond to preassigned states at the end of said predetermined time.

Claim 7

In a data processing system having a processor and a store, said store comprising a plurality of data words and a plurality of multicode registers, a first code in each register for storing the status of said register, a group of codes in each register, each code of said group for addressing other registers, means responsive to said register addressing codes for selectively linking said register to a group of said multicode registers, and means for detecting an error in one of said status codes and addressing coDes, a method for initializing a register in which an error is detected comprising the processor performed steps of: altering the status code of said detected register to ineffectuate processing references to said detected register, altering said detected register address codes to link said detected register to a list for isolating detected registers from other of said multicode registers for a predetermined time, deleting data words in said store making reference to said detected register during said predetermined time, and altering the codes of said detected register to correspond to a preassigned state after said predetermined time.

Claim 8

In a data processing system having a processor and a store, said store comprising a plurality of data words and a plurality of multicode registers, a first code in each register for storing the status of said register, a group of codes in each register, each code of said group for addressing other registers, means responsive to said register addressing codes for selectively linking said register to a group of said multicode registers, and means for detecting an error in one of said status codes and addressing coDes, a method for initializing a register in which an error is detected comprising the processor performed steps of: altering the status code of said detected register to ineffectuate processing references to said detected register, altering said detected register address codes to link said detected register to a list for isolating detected registers from other of said multicode registers for a predetermined time, deleting data words in said store making reference to said detected register during said predetermined time, and altering the codes of said detected register to correspond to a preassigned state after said predetermined time.

Claim 9

In a data system having a processor, a store and a plurality of peripheral devices, said store comprising a plurality of data items and a plurality of multicode registers, each register being assigned to a peripheral device, a code in each register for storing the status of the device to which the register is assigned, a code in each register for addressing at least one other register, means responsive to said register addressing code for linking said register onto a plurality of register lists whereby the operations of said devices are coordinated, and means for detecting an error in one of said status codes and address codes, a method for idling the register in which an error is detected comprising the processor performed steps of: altering said detected register address code to unlink said detected register from said plurality of linked lists, altering said detected register status code to ineffectuate processing references to said detected register, altering said detected register address code to link said detected register to a list for isolating detected registers from said plurality of register lists for a predetermined time, deleting data items in said store referring to said detected register during said predetermined time, and modifying the codes of said detected register to cause the device to which the detected register is assigned to return to an idle state at the end of said predetermined time.

Claim 10

In a data system having a processor, a store and a plurality of peripheral devices, said store comprising a plurality of data items and a plurality of multicode registers, each register being assigned to a peripheral device, a code in each register for storing the status of the device to which the register is assigned, a code in each register for addressing at least one other register, means responsive to said register addressing code for linking said register onto a plurality of register lists whereby the operations of said devices are coordinated, and means for detecting an error in one of said status codes and address codes, a method for idling the register in which an error is detected comprising the processor performed steps of: altering said detected register address code to unlink said detected register from said plurality of linked lists, altering said detected register status code to ineffectuate processing references to said detected register, altering said detected register address code to link said detected register to a list for isolating detected registers from said plurality of register lists for a predetermined time, deleting data items in said store referring to said detected register during said predetermined time, and modifying the codes of said detected register to cause the device to which the detected register is assigned to return to an idle state at the end of said predetermined time.

Claim 11

In a system having a plurality of peripheral devices and a common control, said common control including a processor and a store, said store comprising a plurality of registers, each register being assigned to a distinct peripheral device, means for linking selected registers to coordinate the operations of said peripheral devices, and means for detecting a distinct register; a method for initializing said distinct register comprising the processor performed steps of: detecting said distinct register, altering said detected register to ineffectuate processing references thereto, isolating said detected register from the other selected registers for a predetermined time, deleting store references to said detected register during said predetermined time, and altering said detected register to put said assigned peripheral device in a preassigned state after said predetermined time.

Claim 12

In a system having a plurality of peripheral devices and a common control, said common control including a processor and a store, said store comprising a plurality of registers, each register being assigned to a distinct peripheral device, means for linking selected registers to coordinate the operations of said peripheral devices, and means for detecting a distinct register; a method for initializing said distinct register comprising the processor performed steps of: detecting said distinct register, altering said detected register to ineffectuate processing references thereto, isolating said detected register from the other selected registers for a predetermined time, deleting store references to said detected register during said predetermined time, and altering said detected register to put said assigned peripheral device in a preassigned state after said predetermined time.

Claim 13

In a system having a plurality of peripheral devices and a common control, said common control including a store comprising a plurality of multicode registers, each register being assigned to a distinct peripheral device, means for linking selected registers to coordinate the operation of the devices to which said selected registers are assigned, means for linking said registers into a plurality of lists to process data representing said devices, and means for detecting a distinct coded register, said lists including a list for isolating said distinct coded registers, a method for initializing a distinct register comprising the steps of: detecting a distinct register, unlinking said detected register from said lists, altering a first code in said detected register to ineffectuate processing references to said detected register, linking said detected register to said isolation list for a predetermined time, deleting store references to said detecteD register during said predetermined time, and altering the codes of said detected register and the selected registers linked thereto to represent idle states of the devices corresponding to said selected registers at the end of said predetermined time.

Claim 14

In a system having a plurality of peripheral devices and a common control, said common control including a store comprising a plurality of multicode registers, each register being assigned to a distinct peripheral device, means for linking selected registers to coordinate the operation of the devices to which said selected registers are assigned, means for linking said registers into a plurality of lists to process data representing said devices, and means for detecting a distinct coded register, said lists including a list for isolating said distinct coded registers, a method for initializing a distinct register comprising the steps of: detecting a distinct register, unlinking said detected register from said lists, altering a first code in said detected register to ineffectuate processing references to said detected register, linking said detected register to said isolation list for a predetermined time, deleting store references to said detecteD register during said predetermined time, and altering the codes of said detected register and the selected registers linked thereto to represent idle states of the devices corresponding to said selected registers at the end of said predetermined time.

Claim 15

In a switching system having a plurality of switching circuits and a common control comprising a plurality of items and a plurality of registers each assigned to one of said circuits, means for linking selected registers to coordinate the operation of circuits to which the selected registers are assigned, means for linking said registers onto a plurality of lists, means for detecting a distinct selected register, a method for initializing said distinct register comprising the processor performed steps of: unlinking said detected register from said plurality of lists, altering said detected register to ineffectuate processing operations on said detected register, isolating said detected register from being linked to other registers for a predetermined time, deleting store items and register references to said detected register during said predetermined time, and modifying said detected register to correspond to a preassigned state at the end of said predetermined time.

Claim 16

In a switching system having a plurality of switching circuits and a common control comprising a plurality of items and a plurality of registers each assigned to one of said circuits, means for linking selected registers to coordinate the operation of circuits to which the selected registers are assigned, means for linking said registers onto a plurality of lists, means for detecting a distinct selected register, a method for initializing said distinct register comprising the processor performed steps of: unlinking said detected register from said plurality of lists, altering said detected register to ineffectuate processing operations on said detected register, isolating said detected register from being linked to other registers for a predetermined time, deleting store items and register references to said detected register during said predetermined time, and modifying said detected register to correspond to a preassigned state at the end of said predetermined time.

Claim 17

In a telephone switching system having a plurality of circuits including trunk circuits and service circuits and a common control including a processor and a store, said store comprising a plurality of items, a plurality of trunk registers each assigned to one of said trunk circuits, and a plurality of service registers each assigned to one of said service circuits, means for linking a trunk register to selected service circuits, means for linking said trunk registers and service registers onto a plurality of lists whereby data corresponding to circuit signals are processed, means for detecting a trunk register having an error, and a list for isolating detected registers from said plurality of lists, a method for initializing a detected trunk register comprising the processor performed steps of: unlinking said detected trunk register from said plurality of lists, altering said trunk register to ineffectuate processing references thereto, linking said trunk register to said isolation list for a predetermined time, deleting store items referring to said detected trunk register during said predetermined time, and altering said detected trunk register and said linked service registers to put said trunk circuit and said linked service circuits into idle states at the end of said predetermined time.

Claim 18

In a telephone switching system having a plurality of circuits including trunk circuits and service circuits and a common control including a processor and a store, said store comprising a plurality of items, a plurality of trunk registers each assigned to one of said trunk circuits, and a plurality of service registers each assigned to one of said service circuits, means for linking a trunk register to selected service circuits, means for linking said trunk registers and service registers onto a plurality of lists whereby data corresponding to circuit signals are processed, means for detecting a trunk register having an error, and a list for isolating detected registers from said plurality of lists, a method for initializing a detected trunk register comprising the processor performed steps of: unlinking said detected trunk register from said plurality of lists, altering said trunk register to ineffectuate processing references thereto, linking said trunk register to said isolation list for a predetermined time, deleting store items referring to said detected trunk register during said predetermined time, and altering said detected trunk register and said linked service registers to put said trunk circuit and said linked service circuits into idle states at the end of said predetermined time.

Claim 19

A data processing system comprising a plurality of peripheral devices, a processor and a store, said store comprising a plurality of registers each assigned to a distinct peripheral device and each comprising a plurality of codes, means for linking together a selected group of said registers for coordinating the operation of devices to which said group is assigned, said processor comprising means for detecting a distinct register in said group, and means for initializing said detected register comprising: means for altering a first code in said detected register to ineffectuate processing references to said detected register, means responsive to the alteration of said first code for altering a second detected register code to isolate said detected register for a predetermined time, means responsive to the alteration of said second code for deleting references in said store to said detected register during said predetermined time, and means operative at the termination of said predetermined time for altering said detected register codes to represent an idle condition of the peripheral device to which said detected register is assigned.

Claim 20

A data processing system comprising a plurality of peripheral devices, a processor and a store, said store comprising a plurality of registers each assigned to a distinct peripheral device and each comprising a plurality of codes, means for linking together a selected group of said registers for coordinating the operation of devices to which said group is assigned, said processor comprising means for detecting a distinct register in said group, and means for initializing said detected register comprising: means for altering a first code in said detected register to ineffectuate processing references to said detected register, means responsive to the alteration of said first code for altering a second detected register code to isolate said detected register for a predetermined time, means responsive to the alteration of said second code for deleting references in said store to said detected register during said predetermined time, and means operative at the termination of said predetermined time for altering said detected register codes to represent an idle condition of the peripheral device to which said detected register is assigned.

Claim 21

In a telephone traffic service position switching system having a plurality of call processing circuits including trunk circuits connectable between a local office and a toll office and connectable to service circuits, a common control comprisIng a processor and a store, said store comprising a plurality of multicode registers each assigned to a call processing circuit including multicode registers assigned to trunk circuits and multicode registers assigned to service circuits, and a plurality of data codes, means for linking said trunk circuit registers into a plurality of lists for call processing by said processor, means for linking a trunk circuit register to selected service circuit registers, and means for detecting an error in one of said selected service circuit registers, a method for idling the trunk circuit linked to said service circuit register in which an error is detected comprising the processor performed steps of: unlinking said trunk register from said plurality of call processing lists, altering said trunk register to ineffectuate call processing references thereto, isolating said trunk register from said plurality of call processing lists and said linked service circuit registers, deleting the data words in said store making reference to said trunk register, and altering said trunk register codes to put said trunk circuit to which the trunk register is assigned in an idle state.

Claim 22

In a telephone traffic service position switching system having a plurality of call processing circuits including trunk circuits connectable between a local office and a toll office and connectable to service circuits, a common control comprisIng a processor and a store, said store comprising a plurality of multicode registers each assigned to a call processing circuit including multicode registers assigned to trunk circuits and multicode registers assigned to service circuits, and a plurality of data codes, means for linking said trunk circuit registers into a plurality of lists for call processing by said processor, means for linking a trunk circuit register to selected service circuit registers, and means for detecting an error in one of said selected service circuit registers, a method for idling the trunk circuit linked to said service circuit register in which an error is detected comprising the processor performed steps of: unlinking said trunk register from said plurality of call processing lists, altering said trunk register to ineffectuate call processing references thereto, isolating said trunk register from said plurality of call processing lists and said linked service circuit registers, deleting the data words in said store making reference to said trunk register, and altering said trunk register codes to put said trunk circuit to which the trunk register is assigned in an idle state.