Run-length-limited coding for modified raised-cosine equalization channel

Claim 3

A data transfer method as set forth in claim 1 wherein the digits of the encoded sequence are caused to pass through said channel at a rate exceeding twice the skew-symmetry frequency of the channel.

Claim 4

A data transfer method as set forth in claim 1 which includes, as a step immediately preceding the passage of the run-length-encoded digits through said channel, a further encoding operation whereby each of the digits of said given binary value in the run-length-encoded sequence generates a change of voltage from one limiting level to the opposite limiting level in a set of thRee discrete voltage levels, while said intervening digits generate no such change of voltage, thereby causing the resultant channel voltage waveform to execute a complete transition from one extreme null level to another extreme null level in response to each input digit of said given value and to execute no such transition in response to the other digits; said method further including the step of detecting complete voltage transitions between said null levels in the received channel signal as representing digits of said given value and all other states as representing digits of said other value.

Claim 5

A data transfer method as set forth in claim 3 wherein the digits of the encoded sequence are caused to pass through said channel at a rate substantially four times the skew-symmetry frequency of the channel.

Claim 6

Data transfer apparatus comprising: a run-length-limited encoder for converting binary input digit sequences into signals representing run-length-limited sequences for passage through said channel, said encoder causing each digit of a given binary value to be represented by a change from one to another of two voltage levels and to be necessarily separated from every other digit of like value in the encoded sequence by at least one intervening digit of different value which causes no such voltage change; a channel through which the run-length-limited sequence generated by said encoder is passed, said channel including the following portions: a step signal generating portion responsive to the digits of said run-length-limited sequence for producing a three-level signal voltage wave in which the signal voltage changes from a limiting level of one polarity to a limiting level of the other polarity in response to each input digit of said given value but does not change polarity in response to digits of said different value; and an equalized channel portion for passing the signal generated by said signal generating portion and having a frequency response characteristic Hc(f) shaped according to the following equation, where T'' is the period between digits in the sequence: means for detecting the presence of digits having said given value and said different value, respectively, in the signal passed by said channel according to the presence or absence of transitions from one limiting voltage level to the other limiting voltage level in said signal; and means for decoding the detected signal.

Claim 7

Data transfer apparatus comprising: a run-length-limited encoder for converting binary input digit sequences into signals representing run-length-limited sequences for passage through said channel, said encoder causing each digit of a given binary value to be represented by a change from one to another of two voltage levels and to be necessarily separated from every other digit of like value in the encoded sequence by at least one intervening digit of different value which causes no such voltage change; a channel through which the run-length-limited sequence generated by said encoder is passed, said channel including the following portions: a step signal generating portion responsive to the digits of said run-length-limited sequence for producing a three-level signal voltage wave in which the signal voltage changes from a limiting level of one polarity to a limiting level of the other polarity in response to each input digit of said given value but does not change polarity in response to digits of said different value; and an equalized channel portion for passing the signal generated by said signal generating portion and having a frequency response characteristic Hc(f) shaped according to the following equation, where T'' is the period between digits in the sequence: means for detecting the presence of digits having said given value and said different value, respectively, in the signal passed by said channel according to the presence or absence of transitions from one limiting voltage level to the other limiting voltage level in said signal; and means for decoding the detected signal.