US3646545A
Expired / Lapsed
US
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Ladderless digital-to-analog converter
Assignee: Singer Co
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Filing: 1970-06-04
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Granted: 1972-02-29
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Expires: 1990-06-04
Abstract
Abstract A charge-gated, ladderless, digital to analog (D to A) converter for converting a digital input signal into an analog output signal. The digital input signal is provided to an analog signal generating circuit, including a counter, which, upon command, generates an analog signal in the form of a pulse width which is a representation of the magnitude of the digital input signal and is a proportion of a predetermined maximum pulse width. The analog signal generating circuit includes means for applying a predetermined reference signal to the input of an integrating circuit for a period of time equal in duration to the pulse width representation of the digital input signal. The output from the integrator is received and stored upon command by storage means including a storage capacitor, to provide the analog output signal. The analog output signal is then connected to the input of the integrator for a period of time equal to the full scale integration time. In effect, when applied to the integrator, the output signal is integrated while the signal from the previous conversion remains stored on the integrator capacitor so that at the end of the integration, the signal at the integrator output is nominally equal to zero. The amount that the output signal from the integrator differs from zero at this time represents the error in the output signal of the converter and, in the subsequent conversion cycles, this error signal acts to correct the error.
Inventors
- 👤 Bob N Naydan
- 👤 John D Brinkman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 06:38
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/06; H03M1/08
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
193 words
A digital to analog converter for converting a digital input signal into an analog output signal comprising: means for receiving a digital signal, said receiving means including means for providing a first digital signal which comprises the most significant bits of said digital signal and a second digital signal which comprises the least significant bits of said digital signal; means for generating a first analog signal which is a representation of said first digital signal; integrator means for generating an integrator output analog signal; storage means for receiving and storing said integrator output analog signal; programming means for selectively causing said first analog signal and said integrator output analog signal to be respectively connected to said integrator means for predetermined periods of time; means for generating a second analog signal which is a representation of said second digital signal; integrator means for generating a second integrator output analog signal; storage means for receiving and storing of said second integrator output analog signal; and programming means for selectively causing said second analog signal and said second integrator output analog signal to be respectively connected to said second intEgrator means for predetermined periods of time.
Claim 2
Dependent Claim
193 words
A digital to analog converter for converting a digital input signal into an analog output signal comprising: means for receiving a digital signal, said receiving means including means for providing a first digital signal which comprises the most significant bits of said digital signal and a second digital signal which comprises the least significant bits of said digital signal; means for generating a first analog signal which is a representation of said first digital signal; integrator means for generating an integrator output analog signal; storage means for receiving and storing said integrator output analog signal; programming means for selectively causing said first analog signal and said integrator output analog signal to be respectively connected to said integrator means for predetermined periods of time; means for generating a second analog signal which is a representation of said second digital signal; integrator means for generating a second integrator output analog signal; storage means for receiving and storing of said second integrator output analog signal; and programming means for selectively causing said second analog signal and said second integrator output analog signal to be respectively connected to said second intEgrator means for predetermined periods of time.
Claim 3
Dependent Claim
15 words
The converter as defined in claim 1 wherein said receiving means is a storage register.
Claim 4
Dependent Claim
32 words
The converter as defined in claim 1 wherein said generating means is further characterized as generating a first analog signal which has a pulse width which is proportional to said digital signal.
Claim 5
Dependent Claim
75 words
The converter as defined in claim 3 wherein said generating means comprises: a source of clock signals; a counter for receiving said digital signal; and means for causing said counter to receive said clock signals until the count stored in said counter is at a predetermined count whereby the number of clock signals supplied to said counter to cause said counter to store said predetermined count determines the pulse width of said first analog signal.
Claim 6
Dependent Claim
47 words
The converter as defined in claim 3 further including a reference signal source and means for causing a reference signal from said reference signal source to be applied to said integrator means for a period of time determined by the pulse width of said first analog signal.
Claim 7
Dependent Claim
74 words
The converter as defined in claim 5 further including a second reference signal source having a polarity opposite to said first reference signal source and wherein said generating means includes circuit means for detecting the polarity of said digital signal so that either of said reference signals may be selectively applied to said integrator means to provide an integrator output analog signal which represents both the magnitude and polarity of the digital input signal.
Claim 8
Dependent Claim
52 words
The converter as defined in claim 3 wherein said program means subsequently causes a reference signal to be applied to said integrator for a period of time determined by said first analog signal, and causes said integrator output analog signal to be connected to said integrator for a predetermined period of time.
Claim 9
Dependent Claim
28 words
The converter as defined in claim 7 wherein said program means is further capable of causing the integrator output analog signal to be received by said storage means.
Claim 10
Independent Claim
214 words
A method of converting a digital input signal into an analog output signal comprising the steps of: receiving a digital input signal; generating a first analog signal which is a representation of said digital signal; said step of generating being further defined by the step of generating a first analog signal which has a pulse width which is a representation of the magnitude of said digital signal; generating a second analog signal from an integrator which is a function of said first analog signal and said analog output signal; said step of generating said second analog signal including the step of integrating a reference signal for a period of time determined by said first analog signal; said step of generating said second analog signal being further defined by the step of integrating said analog output signal for a predetermined period of time; said step of integrating said integrator output signal for a predetermined period of time being followed by the step of integrating said reference signal for a period of time determined by said first analog signal; receiving and storing said second analog signal to provide said analog output signal; and selectively causing said first analog signal and said integrator output signal to be respectively connected to said integrator for selected periods of time.
Claim 11
Independent Claim
214 words
A method of converting a digital input signal into an analog output signal comprising the steps of: receiving a digital input signal; generating a first analog signal which is a representation of said digital signal; said step of generating being further defined by the step of generating a first analog signal which has a pulse width which is a representation of the magnitude of said digital signal; generating a second analog signal from an integrator which is a function of said first analog signal and said analog output signal; said step of generating said second analog signal including the step of integrating a reference signal for a period of time determined by said first analog signal; said step of generating said second analog signal being further defined by the step of integrating said analog output signal for a predetermined period of time; said step of integrating said integrator output signal for a predetermined period of time being followed by the step of integrating said reference signal for a period of time determined by said first analog signal; receiving and storing said second analog signal to provide said analog output signal; and selectively causing said first analog signal and said integrator output signal to be respectively connected to said integrator for selected periods of time.
Claim 12
Dependent Claim
23 words
The method as defined in claim 9 wherein the step of receiving said digital signal includes the step of storing said digital signal.
Claim 13
Dependent Claim
60 words
The method as defined in claim 9 wherein the step of generating the first analog signal includes the step of storing said digital signal and counting a number of pulses, each of which has a predetermined width, to generate said first analog signal which is further defined as having a pulse width which is a representation of said digital signal.
Claim 14
Dependent Claim
21 words
The method as defined in claim 9 wherein the step of generating is followed by the sTep of receiving and storing.
Claim 15
Dependent Claim
29 words
The method as defined in claim 12 further including the step of detecting the polarity of said digital signal and selectively applying a reference signal of a given polarity.
Claim 16
Dependent Claim
71 words
The method as defined in claim 9 further including the step of generating a first digital signal which comprises the most significant bits of said digital input signal and a second digital signal which comprises the least significant bits of said digital input signal and wherein the step of generating a first analog signal is further defined in that said first analog signal is a representation of said first digital signal.
Claim 17
Dependent Claim
59 words
The method as defined in claim 14 further including the step of generating a third analog signal which is a representation of said second digital signal, generating a fourth analog signal which is a function of said first analog signal and said third analog signal, and receiving and storing said fourth analog signal to provide said analog output signal.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-02-28 | 1975-08-30 | 1976-02-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-02-28 | 1979-08-30 | 1980-02-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-02-28 | 1983-08-30 | 1984-02-29 | $7700.00 | Window Closed / Lapsed |