High-density data processing

Claim 2

Data processing apparatus comprising input means for receiving a data bit stream including a series of successive data input signals representing digital data bits of two or more different significances; data output means for representing said stream of digital bits in coded form and adapted to be actuated between a plurality of different significant states; and coding means responsive to said input signals and acting while in continuous operation to produce a series of changes in state of said output means at the rate of a single change in significant state, from one of said states to another without return, for each bit in said stream having any of said significances; said coding means being operable, in representing two successive bits of said stream having the same significance, and also in representing two successive bits of said stream having different significances, to end one bit and commence the next in the same one of said states; said coding means being operable to distinguish between said bits of different significance by shifting the occurrence of the corresponding change in state to a slightly different time if it represents a bit of a first significance than if it represents a bit of a second significance.

Claim 3

Data processing apparatus as recited in claim 1, in which said output means include means for recoding said changes in state on a record track as corresponding changes in state of the track which are shifted slightly longitudinally of the track to distinguish between said bits of different significance.

Claim 4

Data processing apparatus comprising input means for receiving a series of data input signals representing digital data bits of two or more different types; data output means for representing said digital bits in coded form and adapted to be actuated between a plurality of different significant states; and coding means responsive to said input signals and acting while in continuous operation to produce a series of changes in state of said output means at the rate of a single change in significant state, from one of said states to another without return, for each bit of any type; said coding means being operable, in representing two successive bits of the same one of said types, and also in representing two successive bits of different types, to end one bit and commence the next in the same one of said states; said coding means being operable to distinguish between said different types of bits by shifting the occurrence of the corresponding chaNge in state to a slightly different time if it represents a bit of a first type than if it represents a bit of a second type, said coding means including clocking means for providing a series of regularly timed clocking signals, said output means including a flip-flop circuit actuable between two different conditions representing said different states of the output means respectively, first gating means responsive to one of said clocking signals to actuate said flip-flop if a data input signal representing one type of bit is received, and additional gating means responsive to one of said clocking signals to actuate said flip-flop in delayed relation thereto if a data input signal representing a different type of bit is received.

Claim 5

Data processing apparatus comprising input means for receiving a series of data input signals representing digital data bits of two or more different types; data output means for representing said digital bits in coded form and adapted to be actuated between a plurality of different significant states; and coding means responsive to said input signals and acting while in continuous operation to produce a series of changes in state of said output means at the rate of a single change in significant state, from one of said states to another without return, for each bit of any type; said coding means being operable, in representing two successive bits of the same one of said types, and also in representing two successive bits of different types, to end one bit and commence the next in the same one of said states; said coding means being operable to distinguish between said different types of bits by shifting the occurrence of the corresponding chaNge in state to a slightly different time if it represents a bit of a first type than if it represents a bit of a second type, said coding means including clocking means for providing a series of regularly timed clocking signals, said output means including a flip-flop circuit actuable between two different conditions representing said different states of the output means respectively, first gating means responsive to one of said clocking signals to actuate said flip-flop if a data input signal representing one type of bit is received, and additional gating means responsive to one of said clocking signals to actuate said flip-flop in delayed relation thereto if a data input signal representing a different type of bit is received.

Claim 6

Data processing apparatus as recited in claim 1, in which said coding means include clock means for providing a series of regularly timed clocking signals, and means for producing from said clocking signals and from said stream of successive data input signals a series of combined control signals which actuate said output means and are timed irregularly to effect said shift in occurrence of changes in state representing a bit of said first significance relative to changes in state representing a bit of said second significance.

Claim 7

Data processing apparatus as recited in claim 1, in which said coding means are operable for each of said successive bits of said stream to change said output means between two opposite significant states and through a null condition and to shift the occurrence of said null condition to a different time for a bit of said first significance than for a bit of said second significance.

Claim 8

Data processing apparatus as recited in claim 1, in which said coding means include clocking means for timing a series of bit cells of uniform length, and means for producing said changes in state representing bits of different significance at different times within said uniform length cells.

Claim 9

Data processing apparatus as recited in claim 1, in which said coding means include means for timing each of said changes in state to occur a controlLed time after the preceding change in state, and regulating the time between successive changes to be longer for bits of one significance than for bits of another significance.

Claim 10

Data processing apparatus as recited in claim 1, including decoding means responsive to said changes in state to produce a series of output signals representing said stream of data bits in decoded form.

Claim 11

Data processing apparatus as recited in claim 1, including decoding means responsive to said changes in state to produce a series of output signals representing said stream of data bits in decoded form, said decoding means being operable to distinguish between said bits of different significance by indicating a different type of bit if a particular change in state occurs at one time than if the same change in state is shifted slightly, less than one bit cell, to a different time.

Claim 12

Data processing apparatus as recited in claim 1, including decoding means responsive to said changes in state to produce a series of output signals representing said stream of data bits in decoded form, said decoding means being operable to distinguish between said bits of different significance by indicating a bit of different significance if a particular change in state occurs at one time than if the same change in state is shifted slightly, less than one-bit cell, to a different time, said decoding means being adapted to respond differently to changes in state which occur within any of a series of timed examination intervals than to changes which occur within periods between said intervals to thereby distinguish between said bits of different significance.

Claim 13

Data processing apparatus as recited in claim 1, including decoding means responsive to said changes in state to produce a series of output signals representing said stream of data bits in decoded form, said decoding means being operable to distinguish between said bits of different significance by indicating a bit of different significance if a particular change in state occurs at one time than if the same change in state is shifted slightly, less than one bit cell, to a different time, said decoding means including means for timing a predetermined interval following each of said changes in state and producing a different output signal if the next significant change of state occurs within said interval than if it occurs after said interval to thereby distinguish between said bits of different significance.

Claim 14

A record track having recorded thereon a data bit stream including a series of successive digital data bits of different significances with each bit in said stream recorded as a single significant change in state of the track from one state to another without return; said changes in state, in representing two successive bits of the same significance, and also in representing two successive bits of different significances, being so recorded as to end one bit and commence the next in the same one of said states; said bits of different significance being distinguished one from another by a shift in each of said single significant changes in state to a different location longitudinally of the track if it represents a bit of a first significance than if it represents a bit of a second significance.

Claim 15

A record track having recorded thereon a data bit stream including a series of successive digital data bits of different significances with each bit in said stream recorded as a single significant change in state of the track from one state to another without return; said changes in state, in representing two successive bits of the same significance, and also in representing two successive bits of different significances, being so recorded as to end one bit and commence the next in the same one of said states; said bits of different significance being distinguished one from another by a shift in each of said single significant changes in state to a different location longitudinally of the track if it represents a bit of a first significance than if it represents a bit of a second significance.

Claim 16

A record track as recited in claim 11, in which said track changes between two opposite states and through a null condition at each of said bits.

Claim 17

A record track as recited in claim 11, in which said track is a magnetic record track and changes between opposite magnetic polarities and through a null condition at each of said bits.

Claim 18

Data processing apparatus comprising input means adapted to represent in coded form a data bit stream including a series of successive digital data bits of two or more different significances, said input means being actuable between a plurality of different significant states; output means for producing a series of output signals representing said stream of digital data bits in decoded form; and decoding meaNs responsive to said changes in state of said input means between said different significant states and acting while in continuous operation to actuate said output means to produce output signals representing said bits at the rate of one digital bit for each change in significant state of said input means, from one of said states to another without return; said decoding means being operable, when decoding two successive bits in said stream having the same significance, and also when decoding two successive bits in said stream having different significances, to actuate said output means to produce output signals representing said successive bits in response to two successive changes in state of said input means one of which ends and the second of which commences at the same state; said decoding means being operable to distinguish between said bits of different significance by indicating a bit of different significance if a particular change in state occurs at one time than if the same change in state is shifted slightly, less than one bit cell, to a different time.

Claim 19

Data processing apparatus comprising input means adapted to represent in coded form a data bit stream including a series of successive digital data bits of two or more different significances, said input means being actuable between a plurality of different significant states; output means for producing a series of output signals representing said stream of digital data bits in decoded form; and decoding meaNs responsive to said changes in state of said input means between said different significant states and acting while in continuous operation to actuate said output means to produce output signals representing said bits at the rate of one digital bit for each change in significant state of said input means, from one of said states to another without return; said decoding means being operable, when decoding two successive bits in said stream having the same significance, and also when decoding two successive bits in said stream having different significances, to actuate said output means to produce output signals representing said successive bits in response to two successive changes in state of said input means one of which ends and the second of which commences at the same state; said decoding means being operable to distinguish between said bits of different significance by indicating a bit of different significance if a particular change in state occurs at one time than if the same change in state is shifted slightly, less than one bit cell, to a different time.

Claim 20

Data processing apparatus as recited in claim 14, in which said input means include a record playback unit operable to respond to a series of changes in state of a record track to actuate said input means between said different significant states thereof.

Claim 21

Data processing apparatus as recited in claim 15, in which said input means are actuable for each bit between two opposite states and through a null condition, said decoding means being responsive to the occurrence of said null condition for each bit to distinguish between said bits of different significance.

Claim 22

Data processing apparatus as recited in claim 15, in which said decoding means include means for comparing the timing of said changes in state with the timing of a clocking signal to determine whether or not the changes in state representing individual ones of said bits have been shifted.

Claim 23

Data processing apparatus as recited in claim 15, in which said decoding means include means for reconstructing a clocking signal from information derived by said decoding means from said input means; and means for comparing the timing of said changes in state with the timing of said clocking signal to determine whether the changes representing individual ones of said bits have been shifted.

Claim 24

Data processing apparatus as recited in claim 14, in which said decoding means are adapted to respond differently to changes in state which occur within any of a series of timed examination intervals than to changes which occur within periods between said intervals to thereby distinguish between said bits of different significance.

Claim 25

Data processing apparatus as recited in claim 14, in which said decoding means include means for timing a predetermined interval following each of said changes in state and producing a different output signal if the next significant change of state occurs within said interval than if it occurs after said interval to thereby distinguish between said bits of different significance.

Claim 26

Data processing apparatus as recited in claim 21, including a magnetic recording head controlled by said flip-flop and operable to produce changes in magnetic state of a magnetic record track corresponding to changes in state of said flip-flop and which are shifted slightly longitudinally of the track to distinguish between said different types of bits.

Claim 27

Data processing apparatus comprising input means for receiving a series of data input signals representing data bits of two or more different types; data output means for representing said bits in coded form and adapted to be actuated between a plurality of different significant states; and coding means responsive to said input signals and acting while in continuous operation to produce a series of changes in state of said output means at the rate of a single change in significant state, from one of said states to another without return, for each bit of any type; said coding means being operable to distinguish between said different types of bits by shifting the occurrence of the corresponding change in state to a slightly different time if it represents a bit of a first type than if it represents a bit of a second type; said output means including a flip-flop circuit actuable between two different conditions representing said different states of the output means respectively, and two different delay circuits responsive to input signals representing said two types of bits respectively and each operable to actuate said flip-flop from one state to another after a delay interval following receipt of an input signal; one of said circuits having a longer delay interval than the other to produce a shorter delay between actuations of the flip-flop for one type of bit than for another type.

Claim 28

Data processing apparatus comprising input means for receiving a series of data input signals representing data bits of two or more different types; data output means for representing said bits in coded form and adapted to be actuated between a plurality of different significant states; and coding means responsive to said input signals and acting while in continuous operation to produce a series of changes in state of said output means at the rate of a single change in significant state, from one of said states to another without return, for each bit of any type; said coding means being operable to distinguish between said different types of bits by shifting the occurrence of the corresponding change in state to a slightly different time if it represents a bit of a first type than if it represents a bit of a second type; said output means including a flip-flop circuit actuable between two different conditions representing said different states of the output means respectively, and two different delay circuits responsive to input signals representing said two types of bits respectively and each operable to actuate said flip-flop from one state to another after a delay interval following receipt of an input signal; one of said circuits having a longer delay interval than the other to produce a shorter delay between actuations of the flip-flop for one type of bit than for another type.

Claim 29

Data processing apparatus as recited in claim 23, including a magnetic recording head controlled by said flip-flop and operable to produce changes in magnetic state of a magnetic record track corresponding to changes in state of said flip-flop and which are shifted slightly longitudinally of the track to distinguish between said different types of bits.

Claim 32

The method as recited in claim 25, including recording said changes in state on a record track as changes in state thereof spaced irregularly in a relation indicating said bits of difFerent significance by slight shifting of the changes in state longitudinally of the track.

Claim 35

Data processing apparatus comprising input means adapted to represent in coded form a series of data bits of two or more different types and actuable between a plurality of different significant states; output means for producing a series of output signals representing said series of data bits in decoded form; and decoding means responsive to said changes in state of said input means between said different significant states and acting while in continuous operation to produce output signals representing said bits at the rate of one bit for each change in significant state of said input means, from one of said states to another without return; said decoding means being operable to distinguish between said different types of bits by indicating a different type of bit if a particular change in state occurs at one time than if the same change in state is shifted slightly, less than one bit cell, to a different time; said input means being actuable between states of positive and negative electrical polarity and through a null condition on each of said changes in state thereof; said output means including an output flip-flop actuable between two different conditions to read out two different types of bits respectively; said decoding means including means for defining a regularly timed examining period continuing through a predetermined portion of each of a series of uniform length bit cells but not within the remainder of each cell, a first gate responsive to arrival of said electrical signal at a null condition and adapted to compare the timing of said null condition with the timing of said examining period and to actuate said flip-flop to a first condition if said null condition occurs during said predetermined portion of a cell, and a second gate responsive to arrival of said electrical signal at a null condition and adapted to compare the timing of said null condition with said examining period and to actuate said flip-flop to a second condition thereof if said null condition occurs during a different portion of a cell.

Claim 36

Data processing apparatus comprising input means adapted to represent in coded form a series of data bits of two or more different types and actuable between a plurality of different significant states; output means for producing a series of output signals representing said series of data bits in decoded form; and decoding means responsive to said changes in state of said input means between said different significant states and acting while in continuous operation to produce output signals representing said bits at the rate of one bit for each change in significant state of said input means, from one of said states to another without return; said decoding means being operable to distinguish between said different types of bits by indicating a different type of bit if a particular change in state occurs at one time than if the same change in state is shifted slightly, less than one bit cell, to a different time; said input means being actuable between states of positive and negative electrical polarity and through a null condition on each of said changes in state thereof; said output means including an output flip-flop actuable between two different conditions to read out two different types of bits respectively; said decoding means including means for defining a regularly timed examining period continuing through a predetermined portion of each of a series of uniform length bit cells but not within the remainder of each cell, a first gate responsive to arrival of said electrical signal at a null condition and adapted to compare the timing of said null condition with the timing of said examining period and to actuate said flip-flop to a first condition if said null condition occurs during said predetermined portion of a cell, and a second gate responsive to arrival of said electrical signal at a null condition and adapted to compare the timing of said null condition with said examining period and to actuate said flip-flop to a second condition thereof if said null condition occurs during a different portion of a cell.

Claim 37

Apparatus as recited in claim 28, in which said means for defining said examining period include circuitry operable to initiate an examining signal in response to each actuation of said flip-flop by either of said gates but operable to introduce a predetermined greater delay into the initiation of said examining signal when said flip-flop is actuated by one gate than when it is actuated by the other gate, and in a relation compensating for differences in timing of the different null conditions and thereby producing said examining pulses during the same portion of each cell.

Claim 38

Data processing apparatus as recited in claim 29, in which said input means include a record playback unit operable to respond to a series of changes in state of a magnetic record track to actuate said input means between said different signiFicant states thereof.

Claim 39

Data processing apparatus comprising input means adapted to represent in coded form a series of digital data bits of two or more different types and actuable between a plurality of different significant states; output means for producing a series of output signals representing said series of digital data bits in decoded form; and decoding means responsive to said changes in state of said input means between said different significant states and acting while in continuous operation to actuate said output means to produce output signals representing said bits at the rate of one digital bit for each change in significant state of said input means, from one of said states to another without return; said decoding means being operable, when decoding two successive bits of the same one of said types, and also when decoding two successive bits of different types, to actuate said output means to produce output signals representing said successive bits in response to two successive changes in state of said input means one of which ends and the second of which commences at the same state; said decoding means being operable to distinguish between said different types of bits by indicating a different type of digital bit if a particular change in state occurs at one time than if the same change in state is shifted slightly, less than one bit cell, to a different time; said output means including an output flip-flop actuable between two different conditions to read out two different types of bits respectively, said decoding means including means for defining an examining interval of predetermined length following each of said changes in state, and circuitry for actuating said flip-flop to indicate one type of bit if the next successive change in state occurs within said examining interval and to indicate another type of bit if said next successive change in state occurs after said examining interval.

Claim 40

Data processing apparatus comprising input means adapted to represent in coded form a series of digital data bits of two or more different types and actuable between a plurality of different significant states; output means for producing a series of output signals representing said series of digital data bits in decoded form; and decoding means responsive to said changes in state of said input means between said different significant states and acting while in continuous operation to actuate said output means to produce output signals representing said bits at the rate of one digital bit for each change in significant state of said input means, from one of said states to another without return; said decoding means being operable, when decoding two successive bits of the same one of said types, and also when decoding two successive bits of different types, to actuate said output means to produce output signals representing said successive bits in response to two successive changes in state of said input means one of which ends and the second of which commences at the same state; said decoding means being operable to distinguish between said different types of bits by indicating a different type of digital bit if a particular change in state occurs at one time than if the same change in state is shifted slightly, less than one bit cell, to a different time; said output means including an output flip-flop actuable between two different conditions to read out two different types of bits respectively, said decoding means including means for defining an examining interval of predetermined length following each of said changes in state, and circuitry for actuating said flip-flop to indicate one type of bit if the next successive change in state occurs within said examining interval and to indicate another type of bit if said next successive change in state occurs after said examining interval.