Semiconductor wireless voltage amplifier mounted on a dielectric substrate

Claim 2

A semiconductor comprising a nonconductive body having opposed parallel surfaces, a hole located within said body extending from one surface to the other, a predetermined layered assembly of crystalline chips adhered in face-to-face contact by a nonconductive bonding material located within said hole, the upper and lower layers of said assembly being substantially coplanar with each of the respective surfaces, and said bonding carrier securing said assembly within said hole.

Claim 3

A semiconductor according to claim 1 wherein the crystalline chips are silicon.

Claim 4

A semiconductor according to claim 1 including a nonconductive cover member overlying each surface of said body, said cover having a film of conductive material exposed on each of its faces in position corresponding to the position of the upper and lower layers, and means for chemically fusing the conductive film on one face of each of said covers to the respective outer layer of said crystalline assembly.

Claim 5

The semiconductor according to Claim 3 including means for encasing said unit into a monolithic structure.

Claim 6

An arrangement of semiconductors comprising a nonconductive body having opposed parallel surfaces, a plurality of holes located within said body in predetermined selected position extending from one surface to the other, a predetermined layered assembly of crystalline wafers adhered in face-to-face contact by a nonconductive bonding material located within each of said holes, the upper and lower layers of each of said assemblies being substantially coplanar with each of the respective surfaces of said body, said bonding material carrier securing each of said assemblies within each hole, a nonconductive cover member overlying each of said surfaces, said cover member having a plurality of metallic elements positioned to correspond to the respective positions of said layered assembly, and means abutting each cover against the respective surface of said body in alignment so that the metallic element is electrically connected to its corresponding layered assembly through the outer layer.

Claim 7

An arrangement of semiconductors comprising a nonconductive body having opposed parallel surfaces, a plurality of holes located within said body in predetermined selected position extending from one surface to the other, a predetermined layered assembly of crystalline wafers adhered in face-to-face contact by a nonconductive bonding material located within each of said holes, the upper and lower layers of each of said assemblies being substantially coplanar with each of the respective surfaces of said body, said bonding material carrier securing each of said assemblies within each hole, a nonconductive cover member overlying each of said surfaces, said cover member having a plurality of metallic elements positioned to correspond to the respective positions of said layered assembly, and means abutting each cover against the respective surface of said body in alignment so that the metallic element is electrically connected to its corresponding layered assembly through the outer layer.

Claim 8

A voltage multiplier for amplifying the voltage of an AC source employing a plurality of parallel circuits connected to said source, each circuit comprising a series connected rectifier and a condenser whereby said voltage is amplified as a multiple of the number of circuits employed, said condensers being alternatively located in a pair of condenser assemblies, each assembly comprising a pair of dielectric members having opposed parallel faces, a series of uniformly spaced capacitor elements provided on each face thereof, said dielectric members being arranged in stacked spaced relationship to form a series of transversely aligned capacitor sets and said rectifier comprises a plurality of layered semiconductor assemblies mounted within a nonconductive body having opposed parallel faces, each of said assemblies comprising a plurality of semiconductors arranged in face-to-face contact within a hole extending from one face of said body to the other face thereof with the upper and lower layers substantially coplanar with the respective surfaces, the holes being arranged in corresponding pattern with said transversely aligned capacitor sets, and means for electrically connecting each of said capacitor elements to the respective layer of said semiconductor.

Claim 9

A voltage multiplier for amplifying the voltage of an AC source employing a plurality of parallel circuits connected to said source, each circuit comprising a series connected rectifier and a condenser whereby said voltage is amplified as a multiple of the number of circuits employed, said condensers being alternatively located in a pair of condenser assemblies, each assembly comprising a pair of dielectric members having opposed parallel faces, a series of uniformly spaced capacitor elements provided on each face thereof, said dielectric members being arranged in stacked spaced relationship to form a series of transversely aligned capacitor sets and said rectifier comprises a plurality of layered semiconductor assemblies mounted within a nonconductive body having opposed parallel faces, each of said assemblies comprising a plurality of semiconductors arranged in face-to-face contact within a hole extending from one face of said body to the other face thereof with the upper and lower layers substantially coplanar with the respective surfaces, the holes being arranged in corresponding pattern with said transversely aligned capacitor sets, and means for electrically connecting each of said capacitor elements to the respective layer of said semiconductor.

Claim 10

The voltage multiplier according to claim 6 wherein said condenser and rectifier are encapsulated in a monolithic unitary housing.

Claim 11

The voltage amplifier according to claim 6 wherein said capacitor elements are deposited in waferlike films of conductive material and are chemically fused to said respective layers of the semiconductor.

Claim 12

The voltage multiplier according to claim 6 wherein said rectifiers comprise a predetermined layered assembly of crystalline chips and conductive bonding material secured within the hole by a semiliquid nonconductive material.

Claim 13

The voltage multiplier according to claim 9 wherein said crystalline chips are silicon.