US3643243A
Expired / Lapsed
US
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Memory system having associated plural timing tracks and data tracks
Assignee: Unisys Corp
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Filing: 1969-11-26
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Granted: 1972-02-15
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Expires: 1989-11-26
Abstract
Abstract A magnetic drum system that incorporates rigid read/write head mountings described as data blocks and spare blocks. Each block includes a timing track head, and an associated group of data track heads which are positioned at associated opposite ends of the block for minimizing skew and crosstalk error. Included is a bad-track memory for electrically switching to a timing track head and an associated group of data track heads in the spare block when a bad-track on the magnetic drum arises under one of the data track heads in the data block.
Inventors
- 👤 Wesley R Johnson
- 👤 Jon J Hamel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 17:27
CPC Classifications
G; G11; G11B; G11B15/00; G11B15/02; G11B15/12
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
212 words
The method of optimizing skew and crosstalk error in a dynamic memory system, comprising: forming an integral data block of rigidly associated first and second timing track heads and rigidly associated first and second groups of data track heads, respectively; arranging the first timing track head and the second timing track head of the data block at opposite ends of the data block; arranging the first group of data track heads adjacent the second timing track head and the second group of data track heads adjacent the first timing track head; arranging the first and second timing track heads and the associated first and second groups of data track heads, respectively, of the data block to be inductively associated with a cylindrical dynamic magnetizable recording surface for defining associated first and second timing tracks and associated first and second groups of data tracks on said recording surface; controlling the first timing track head in the data block for selectively timing the reading from and the writing on said recording surface by its associated first group of data track heads; and, controlling the second timing track head in the data block for selectively timing the reading from and the writing on said recording surface by its associated second group of data track heads.
Claim 2
Independent Claim
212 words
The method of optimizing skew and crosstalk error in a dynamic memory system, comprising: forming an integral data block of rigidly associated first and second timing track heads and rigidly associated first and second groups of data track heads, respectively; arranging the first timing track head and the second timing track head of the data block at opposite ends of the data block; arranging the first group of data track heads adjacent the second timing track head and the second group of data track heads adjacent the first timing track head; arranging the first and second timing track heads and the associated first and second groups of data track heads, respectively, of the data block to be inductively associated with a cylindrical dynamic magnetizable recording surface for defining associated first and second timing tracks and associated first and second groups of data tracks on said recording surface; controlling the first timing track head in the data block for selectively timing the reading from and the writing on said recording surface by its associated first group of data track heads; and, controlling the second timing track head in the data block for selectively timing the reading from and the writing on said recording surface by its associated second group of data track heads.
Claim 3
Dependent Claim
151 words
The method in claim 1 further comprising: forming an integral spare block of A rigidly associated spare timing track head and a plurality of rigidly associated spare data track heads; arranging the spare timing track head and the plurality of associated spare data track heads of the spare block to be inductively associated with said recording surface for defining an associated spare timing track and a plurality of associated spare data tracks on said recording surface; and, switching the reading from and the writing on said recording surface from the first timing track head and the associated first group of data track heads in the data block to the spare timing track head and the associated spare data track heads in the spare block whenever one of the data tracks defined by the switched-from data track head in the switched-from data block is associated with a bad-track on said recording surface.
Claim 4
Dependent Claim
82 words
The method of claim 2 further comprising: switching the reading from and the writing on said recording surface from the second timing track head and the associated second group of data track heads in the data block to the spare timing track head and the associated spare data track heads in the spare block whenever one of the data tracks defined by the switched-from data track head in the switched-from data block is associated with a bad track on said recording surface.
Claim 5
Dependent Claim
54 words
The method of claim 3 further comprising: forming said data block with an additional plurality of rigidly associated spare heads; and arranging the additional plurality of spare heads intermediate the first and second groups of data track heads and inductively coupled to said recording surface for defining associated spare tracks on said recording surface.
Claim 6
Dependent Claim
39 words
The method of claim 4 further comprising: controlling the first or second timing track heads in said data block for selectively timing the reading from and the writing on said recording surface by said additional plurality of spare heads.
Claim 7
Independent Claim
287 words
The method of optimizing skew and crosstalk error in a dynamic memory system, comprising: forming an integral data block including a rigidly associated first timing track head and a plurality of first associated data track heads; arranging the first timing track head and the plurality of first associated data track heads of the data block to be inductively associated with a first timing track and a plurality of first associated data tracks on a cylindrical dynamic magnetizable recording surface; forming an integral spare block including a rigidly associated spare timing track head and a plurality of associated spare data track heads; arranging the spare timing track head and the plurality of associated spare data track heads of the spare block to be inductively associated with a spare timing track and a plurality of associated spare data tracks on said recording surface; coupling read/write conductor means to said first associated data track heads; controlling said first timing track head for selectively timing the reading from and the writing on said recording surface by said first associated data track heads; testing the first timing track and the plurality of first associated data tracks on said recording surface for an associated bad track; locating a bad-track among said first associated data tracks; decoupling said read/write conductor means from said first associated data track heads that are associated with said bad-track and coupling said decoupled read/write conductor means to said associated spare track heads; and, switching the timing of the reading from and the writing on said recording surface from the first timing track head to the spare timing track head whenever the reading from and the writing on said recording surface is performed by said associated spare data track heads.
Claim 8
Independent Claim
287 words
The method of optimizing skew and crosstalk error in a dynamic memory system, comprising: forming an integral data block including a rigidly associated first timing track head and a plurality of first associated data track heads; arranging the first timing track head and the plurality of first associated data track heads of the data block to be inductively associated with a first timing track and a plurality of first associated data tracks on a cylindrical dynamic magnetizable recording surface; forming an integral spare block including a rigidly associated spare timing track head and a plurality of associated spare data track heads; arranging the spare timing track head and the plurality of associated spare data track heads of the spare block to be inductively associated with a spare timing track and a plurality of associated spare data tracks on said recording surface; coupling read/write conductor means to said first associated data track heads; controlling said first timing track head for selectively timing the reading from and the writing on said recording surface by said first associated data track heads; testing the first timing track and the plurality of first associated data tracks on said recording surface for an associated bad track; locating a bad-track among said first associated data tracks; decoupling said read/write conductor means from said first associated data track heads that are associated with said bad-track and coupling said decoupled read/write conductor means to said associated spare track heads; and, switching the timing of the reading from and the writing on said recording surface from the first timing track head to the spare timing track head whenever the reading from and the writing on said recording surface is performed by said associated spare data track heads.
Claim 9
Dependent Claim
152 words
A dynamic memory system comprising: a dynamic cylindrical magnetizable recording surface capable of having a bad-track thereon; a data block having a plurality of rigidly coupled read/write heads that aRe inductively associated with said recording surface; said read/write heads including first and second timing track heads and associated first and second groups of data track heads, respectively; said first and second groups of data track heads positioned intermediate and adjacent to said data block''s second and first timing track heads, respectively; a plurality of timing tracks and data tracks along said recording surface, each track under and defined by an associated one of said read/write heads; means for controlling said data block''s first timing track head to provide timing for said data block''s first group of data tracks heads and for controlling said data block''s second timing track head to provide timing for said data block''s second group of data track heads.
Claim 10
Dependent Claim
152 words
A dynamic memory system comprising: a dynamic cylindrical magnetizable recording surface capable of having a bad-track thereon; a data block having a plurality of rigidly coupled read/write heads that aRe inductively associated with said recording surface; said read/write heads including first and second timing track heads and associated first and second groups of data track heads, respectively; said first and second groups of data track heads positioned intermediate and adjacent to said data block''s second and first timing track heads, respectively; a plurality of timing tracks and data tracks along said recording surface, each track under and defined by an associated one of said read/write heads; means for controlling said data block''s first timing track head to provide timing for said data block''s first group of data tracks heads and for controlling said data block''s second timing track head to provide timing for said data block''s second group of data track heads.
Claim 11
Dependent Claim
226 words
A dynamic memory system, comprising: a dynamic drum rotor having a magnetizable recording surface capable of having a bad-track thereon; first and second head blocks, each of said head blocks having a plurality of rigidly aligned read/write heads that are inductively associated with said recording surface; said read/write heads in said first head block including first and second timing track heads, and associated first and second groups of data track heads, respectively; said first and second groups of data track heads positioned intermediate and adjacent to said second and first timing track heads, respectively; first means for causing said first head block''s first timing track head to provide timing for its first group of associated data track heads and for causing said first head block''s second timing track head to provide timing for its second group of associated data track heads; said read write heads in said second head block including a group of data track heads and an associated timing track head; second means for causing said second head block''s timing track head to provide timing for its group of associated data track heads; and control means including said first and second means for selectively reading from or writing with said second head block instead of said first head block when a read/write head in said first head block is inductively associated with a bad-track.
Claim 12
Dependent Claim
226 words
A dynamic memory system, comprising: a dynamic drum rotor having a magnetizable recording surface capable of having a bad-track thereon; first and second head blocks, each of said head blocks having a plurality of rigidly aligned read/write heads that are inductively associated with said recording surface; said read/write heads in said first head block including first and second timing track heads, and associated first and second groups of data track heads, respectively; said first and second groups of data track heads positioned intermediate and adjacent to said second and first timing track heads, respectively; first means for causing said first head block''s first timing track head to provide timing for its first group of associated data track heads and for causing said first head block''s second timing track head to provide timing for its second group of associated data track heads; said read write heads in said second head block including a group of data track heads and an associated timing track head; second means for causing said second head block''s timing track head to provide timing for its group of associated data track heads; and control means including said first and second means for selectively reading from or writing with said second head block instead of said first head block when a read/write head in said first head block is inductively associated with a bad-track.
Claim 13
Dependent Claim
251 words
A dynamic memory system including: a dynamic drum rotor having a magnetizable recording surface; said recording surface capable of including at least one bad-spot; a plurality of head blocks, each of said head blocks having a plurality of rigidly associated timing, data and spare track heads inductively associated with said recording surface; said head blocks comprising a plurality of data blocks and at least one spare block; means for causing relative motion between said plurality of head blocks and said recording surface; a plurality of timing tracks, data tracks and spare tracks along said recording surface, each track under and defined by an associated one of said heads, said data track heads arranged in groups of n heads, where n is an integer greater than 1, in said data blocks and in said spare block for forming on said recording surface associated data channels of n data tracks each; control means for selecting one of said data channels that is associated with a selected one of said data blocks for reading from or writing onto said selected data channel on said recording surface; means for coupling said control means to a data channel under said spare block when said selected data channel under said otherwise selected data block has been determined to include a bad-spot; and, switching means for switching to a timing track under said spare block from a timing track under said otherwise selected data block when reading from or writing onto the data channel under said spare block.
Claim 14
Dependent Claim
251 words
A dynamic memory system including: a dynamic drum rotor having a magnetizable recording surface; said recording surface capable of including at least one bad-spot; a plurality of head blocks, each of said head blocks having a plurality of rigidly associated timing, data and spare track heads inductively associated with said recording surface; said head blocks comprising a plurality of data blocks and at least one spare block; means for causing relative motion between said plurality of head blocks and said recording surface; a plurality of timing tracks, data tracks and spare tracks along said recording surface, each track under and defined by an associated one of said heads, said data track heads arranged in groups of n heads, where n is an integer greater than 1, in said data blocks and in said spare block for forming on said recording surface associated data channels of n data tracks each; control means for selecting one of said data channels that is associated with a selected one of said data blocks for reading from or writing onto said selected data channel on said recording surface; means for coupling said control means to a data channel under said spare block when said selected data channel under said otherwise selected data block has been determined to include a bad-spot; and, switching means for switching to a timing track under said spare block from a timing track under said otherwise selected data block when reading from or writing onto the data channel under said spare block.
Claim 15
Dependent Claim
34 words
The system of claim 9 wherein each of said data blocks includes first and second timing track heads, first and second groups of n data track heads and a group of spare track heads.
Claim 16
Dependent Claim
66 words
The System of claim 10 wherein each of said first and second timing track heads is positioned at the opposite end of its data block; said first and second groups of n data track heads are positioned adjacent said second and first timing track heads, respectively; and said group of spare track heads is positioned intermediate said first and second groups of n data track heads.
Claim 17
Dependent Claim
266 words
A dynamic memory system, comprising: a dynamic drum rotor having a magnetizable recording surface capable of having at least one bad-track; a plurality of head blocks, each of said head blocks having a plurality of rigidly aligned read/write heads that are inductively associated with said recording surface; said plurality of head blocks comprising a plurality of data blocks and at least one spare block; each of said data blocks having first and second timing track heads position at opposite ends of its data block, and associated first and second groups of data track heads, respectively; the first and second groups of data track heads in each of said data blocks positioned adjacent said second and first timing track heads, respectively, and intermediate thereto; first means for causing each of said data a block''s first timing track head to provide timing for its associated first group of data track heads and for causing each of said data block''s second timing track head to provide timing for said data block''s associated second group of data track heads; said spare block including a third group of data track heads and an associated third timing track head; second means for causing said third timing track head to provide timing for said third group of data track heads; and control means including said first and second means for selectively timing the reading from or the writing with said third group of data track heads by said associated third timing track head when a bad-track is determined to be associated with an otherwise-selected data track head of said first or second groups.
Claim 18
Dependent Claim
266 words
A dynamic memory system, comprising: a dynamic drum rotor having a magnetizable recording surface capable of having at least one bad-track; a plurality of head blocks, each of said head blocks having a plurality of rigidly aligned read/write heads that are inductively associated with said recording surface; said plurality of head blocks comprising a plurality of data blocks and at least one spare block; each of said data blocks having first and second timing track heads position at opposite ends of its data block, and associated first and second groups of data track heads, respectively; the first and second groups of data track heads in each of said data blocks positioned adjacent said second and first timing track heads, respectively, and intermediate thereto; first means for causing each of said data a block''s first timing track head to provide timing for its associated first group of data track heads and for causing each of said data block''s second timing track head to provide timing for said data block''s associated second group of data track heads; said spare block including a third group of data track heads and an associated third timing track head; second means for causing said third timing track head to provide timing for said third group of data track heads; and control means including said first and second means for selectively timing the reading from or the writing with said third group of data track heads by said associated third timing track head when a bad-track is determined to be associated with an otherwise-selected data track head of said first or second groups.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-02-14 | 1975-08-16 | 1976-02-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-02-14 | 1979-08-16 | 1980-02-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-02-14 | 1983-08-16 | 1984-02-15 | $7700.00 | Window Closed / Lapsed |