US3643151A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Overcurrent proof constant voltage
Assignee: Panasonic Holdings Corp
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Filing: 1970-09-01
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Granted: 1972-02-15
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Expires: 1990-09-01
Abstract
Abstract A power source circuit having an overcurrent preventing means comprising a transistor connected in series with a load for controlling the output voltage supplied to the load to a constant value, and a base circuit for the transistor including a thyristor triggered by a voltage produced across a current detection resistor connected in series with the load and a delay means to cut off the thyristor a predetermined time after the triggering of the thyristor. The delay means consists of either a combination of a resistor and a capacitor or a combination of a lamp and a photoconductive cell. The thyristor is short circuited either indirectly by driving another switching means or directly through the main component element of the delay means to cut off the thyristor.
Inventors
- 👤 Hiroshi Matsushima
- 👤 Ichiro Arimura
- 👤 Hiroshi Goto
- 👤 Yoshikadzu Nakao
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 11:47
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/565; G05F1/569; G05F1/573
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
175 words
A power source circuit comprising a current control means to be connected in series with a load, an overcurrent preventing means connected to said current control means and having a thyristor, said overcurrent preventing means comprising a means for reCovering the normal state of said thyristor after the lapse of a predetermined time interval following the actuation of said overcurrent preventing means, whereby when current supplied to said load exceeds a predetermined value said overcurrent preventing means is actuated to operate said current control means so as to temporarily cut the current supply to said load for a constant period of time until the normal state of said current control means is restored by said overcurrent preventing means, and wherein said means for recovering the normal state of said thyristor in said overcurrent preventing means consists of a circuit having a predetermined time constant for short circuiting said thyristor to turn off said thyristor after the lapse of a predetermined time interval after the terminal voltage across said thyristor is changed to trigger said thyristor.
Claim 2
Dependent Claim
175 words
A power source circuit comprising a current control means to be connected in series with a load, an overcurrent preventing means connected to said current control means and having a thyristor, said overcurrent preventing means comprising a means for reCovering the normal state of said thyristor after the lapse of a predetermined time interval following the actuation of said overcurrent preventing means, whereby when current supplied to said load exceeds a predetermined value said overcurrent preventing means is actuated to operate said current control means so as to temporarily cut the current supply to said load for a constant period of time until the normal state of said current control means is restored by said overcurrent preventing means, and wherein said means for recovering the normal state of said thyristor in said overcurrent preventing means consists of a circuit having a predetermined time constant for short circuiting said thyristor to turn off said thyristor after the lapse of a predetermined time interval after the terminal voltage across said thyristor is changed to trigger said thyristor.
Claim 3
Dependent Claim
218 words
A power source circuit comprising a current control means to be connected in series with a load, an overcurrent preventing means connected to said current control means and having a thyristor, said overcurrent preventing means comprising a means for recovering the normal state of said thyristor after the lapse of a predetermined time interval following the actuation of said overcurrent preventing means, whereby when current supplied to said load exceeds a predetermined value said overcurrent preventing means is actuated to operate said current control means so as to temporarily cut the current supply to said load for a constant period of time until the normal state of said current control means is restored by said overcurrent preventing means, and wherein said circuit having a predetermined time constant includes a resistor and a capacitor connected in series, on which circuit there is impressed a voltage corresponding to the terminal voltage across said thyristor in said overcurrent preventing means, and a transistor connected in parallel with said thyristor for detecting the terminal voltage across said capacitor, whereby when said thyristor is triggered a voltage is impressed across said resistor and the capacitor connected in series, and when said transistor is triggered said transistor short circuits said thyristor for a constant time determined by the time constant of said series circuit.
Claim 4
Dependent Claim
218 words
A power source circuit comprising a current control means to be connected in series with a load, an overcurrent preventing means connected to said current control means and having a thyristor, said overcurrent preventing means comprising a means for recovering the normal state of said thyristor after the lapse of a predetermined time interval following the actuation of said overcurrent preventing means, whereby when current supplied to said load exceeds a predetermined value said overcurrent preventing means is actuated to operate said current control means so as to temporarily cut the current supply to said load for a constant period of time until the normal state of said current control means is restored by said overcurrent preventing means, and wherein said circuit having a predetermined time constant includes a resistor and a capacitor connected in series, on which circuit there is impressed a voltage corresponding to the terminal voltage across said thyristor in said overcurrent preventing means, and a transistor connected in parallel with said thyristor for detecting the terminal voltage across said capacitor, whereby when said thyristor is triggered a voltage is impressed across said resistor and the capacitor connected in series, and when said transistor is triggered said transistor short circuits said thyristor for a constant time determined by the time constant of said series circuit.
Claim 5
Dependent Claim
78 words
A power source circuit according to claim 1, wherein said circuit having a predetermined time constant includes a transistor for detecting the terminal voltage drop across said thyristor in said overcurrent preventing means, a series connection of a resistor and a capacitor, said series connection being connected between the collector and emitter of said transistor, and a transistor connected in parallel with said thyristor and cutting off said thyristor by detecting a voltage built up across said capacitor.
Claim 6
Dependent Claim
68 words
A power source circuit according to claim 1, wherein said circuit having a predetermined time constant includes a light source connected in series with said thyristor in said overcurrent preventing means, and a photoconductive element connected in parallel with said thyristor and optically coupled with said light source and delay in the operation of said photoconductive element with respect to the operation of said light source is utilized.
Claim 7
Dependent Claim
23 words
A power source circuit according to claim 4, wherein said light source is a lamp and said photoconductive element is a CdS cell.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-02-14 | 1975-08-16 | 1976-02-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-02-14 | 1979-08-16 | 1980-02-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-02-14 | 1983-08-16 | 1984-02-15 | $7700.00 | Window Closed / Lapsed |