Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
154 words
A system for synchronizing signals having corresponding relatively high rate periodic timing waveforms and relatively low rate periodic timing waveforms comprising; first electrical counter means adapted to receive a first of said signals and being responsive thereto to count the high rate timing waveforms occurring after each of the low rate timing waveforms thereof; second electrical counter means adapted to receive a second of said signals and being responsive thereto to count the high rate timing waveforms occurring after each of the low rate timing waveforms thereof; electrical subtractor means connected to said first and second counter means and being responsive thereto to issue a signal representing the instantaneous difference in counts registered thereby, and signal rate control means connected to said subtractor means and responsive to the signal issued thereby for adjusting the rate of one of said first-mentioned signals to obtain a desired phase relationship between said low rate timing waveforms thereof.
Claim 2
Independent Claim
154 words
A system for synchronizing signals having corresponding relatively high rate periodic timing waveforms and relatively low rate periodic timing waveforms comprising; first electrical counter means adapted to receive a first of said signals and being responsive thereto to count the high rate timing waveforms occurring after each of the low rate timing waveforms thereof; second electrical counter means adapted to receive a second of said signals and being responsive thereto to count the high rate timing waveforms occurring after each of the low rate timing waveforms thereof; electrical subtractor means connected to said first and second counter means and being responsive thereto to issue a signal representing the instantaneous difference in counts registered thereby, and signal rate control means connected to said subtractor means and responsive to the signal issued thereby for adjusting the rate of one of said first-mentioned signals to obtain a desired phase relationship between said low rate timing waveforms thereof.
Claim 3
Dependent Claim
63 words
The system as defined in claim 1 wherein said first and second counters are digital counters and said subtractor is a digital subtractor and further comprising a digital-to-analog converter responsive to the output of said digital subtractor to develop an analog error signal having a magnitude and polarity representing a phase error between said second rate pulses of said first and second signals.
Claim 4
Dependent Claim
75 words
The system as defined in claim 1 wherein said first counter comprises an offset counter for counting high rate waveforms after each low rate waveform of said first signal and a principal counter connected to receive the count registered by said first counter in response to a low rate signal waveform and said principal counter continuing to count high rate first signal waveforms from the offset count until a succeeding low rate second signal waveform.
Claim 5
Dependent Claim
32 words
The system as defined in claim 3 further comprising a reset means responsive to a preselected maximum count on said offset counter means for resetting such counter to a preselected minimum count.
Claim 6
Dependent Claim
203 words
In a servo circuit for a tape transport having a coarse feedback correction network for synchronizing a relatively low rate reproduce timing pulse signal with a corresponding low rate reference pulse signal and fine feedback correction network for synchronizing a relatively faster rate reproduce timing pulse signal with a corresponding relatively high rate reference pulse signal, said coarse feedback correction network comprising in combination with said fine feedback correction network: a first counting means counting the number of higher rate reproduce pulses following each lower rate reproduce pulse, second counting means counting the number of higher rate reference pulses following each lower rate reference pulse, subtracting means connected and responsive to the counts registered by said first and second counting means to issue a signal representing the count difference therebetween, digital-to-analog converter means responsive to the output of said subtracting means and being connected in said coarse feedback circuit to issue an error signal for synchronizing said lower rate reproduce and reference timing pulse signals, and switching means connected between the output of said subtracting means and said fine feedback correction network and being responsive to the occurrence of a preselected minimum difference count to initiate operation of said fine feedback correction network.
Claim 7
Dependent Claim
203 words
In a servo circuit for a tape transport having a coarse feedback correction network for synchronizing a relatively low rate reproduce timing pulse signal with a corresponding low rate reference pulse signal and fine feedback correction network for synchronizing a relatively faster rate reproduce timing pulse signal with a corresponding relatively high rate reference pulse signal, said coarse feedback correction network comprising in combination with said fine feedback correction network: a first counting means counting the number of higher rate reproduce pulses following each lower rate reproduce pulse, second counting means counting the number of higher rate reference pulses following each lower rate reference pulse, subtracting means connected and responsive to the counts registered by said first and second counting means to issue a signal representing the count difference therebetween, digital-to-analog converter means responsive to the output of said subtracting means and being connected in said coarse feedback circuit to issue an error signal for synchronizing said lower rate reproduce and reference timing pulse signals, and switching means connected between the output of said subtracting means and said fine feedback correction network and being responsive to the occurrence of a preselected minimum difference count to initiate operation of said fine feedback correction network.
Claim 8
Dependent Claim
68 words
In the circuit as defined by claim 5, said first counting means comprising an offset counter for counting high rate reproduce signal pulses following each low rate reproduce pulse and a principal counter connected to store the offset count in response to each low rate reference pulse and thereafter accumulate high rate reproduce signal pulses, said subtracting means being responsive to the counting state of said principal counter.
Claim 9
Dependent Claim
29 words
In the circuit as defined by claim 5, said first and sEcond counting means are comprised of digital counters and said subtracting means is comprised of a digital subtractor.
Claim 10
Dependent Claim
45 words
In the circuit as defined by claim 7, said switching means being comprised of a difference decoder connected to the output of said subtracting means and being responsive to preselected digital states thereof to selectively enable or disable operation of said fine feedback correction network.
Claim 11
Dependent Claim
72 words
In the circuit as defined by claim 5, wherein said low rate timing pulses represent the vertical synchronizing pulses of a video signal and further comprising pulse shaping means responsive to the reproduce and reference low rate signal pulses to develop trigger pulses in response to the leading and trailing edges of each of such pulse whereby suitable phasing of the switching operations of said first and second counting means is effected.
Claim 12
Dependent Claim
38 words
In the circuit as defined by claim 6, further comprising a preset constants register connected to said offset counter for storing a predetermined count on said offset counter in response to each said low rate reproduce signal pulse.
Claim 13
Dependent Claim
116 words
Method of synchronizing signals each having timing pulses occurring at a relatively high rate and timing pulses occurring at a relatively lower second rate, comprising: counting the high rate pulses following a lower rate pulse of a first of said signals, counting the high rate pulses following a lower rate pulse of a second of said signals, continuously subtracting one of these counts from the other, adjusting the rate of at least one of said signals in response to the magnitude of the difference provided by the subtracting step such that the difference between said counts approaches a preselected value corresponding to desired phase relationship between the lower rate pulses of said first and second signals.
Claim 14
Dependent Claim
116 words
Method of synchronizing signals each having timing pulses occurring at a relatively high rate and timing pulses occurring at a relatively lower second rate, comprising: counting the high rate pulses following a lower rate pulse of a first of said signals, counting the high rate pulses following a lower rate pulse of a second of said signals, continuously subtracting one of these counts from the other, adjusting the rate of at least one of said signals in response to the magnitude of the difference provided by the subtracting step such that the difference between said counts approaches a preselected value corresponding to desired phase relationship between the lower rate pulses of said first and second signals.
Claim 15
Dependent Claim
49 words
A method as defined in claim 11, further comprising the step of continuing said counting of said high rate pulses of said first signal until the occurrence of a lower rate pulse of said second signal even though there is an intervening lower rate pulse of said first signal.
Claim 16
Dependent Claim
50 words
The method as defined in claim 11 wherein said counting steps develop digital signals and said subtracting step develops a digital difference signal and further comprising, the step of converting said digital difference signal to an analog error signal representative of a phase relation between said first and second signals.
Claim 17
Dependent Claim
38 words
The method as defined in claim 11, further comprising the step of initiating synchronization of said high rate pulses of said first and second signals only in response to a preselected difference count registered by said subtracting step.