US3641494A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Bidirectional data transmission system with error correction
Assignee: International Standard Electric Corp
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Filing: 1970-02-12
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Granted: 1972-02-08
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Expires: 1990-02-12
Abstract
Abstract A bidirectional data transmission system for transmitting information between two terminal stations incorporating in each terminal station an arrangement for checking the received data and providing error correction when errors are detected in the received data. Each of the terminals include a memory for storing the m last words transmitted from that terminal. When an error is detected in one terminal, the transfer of received data to a data processor is blocked and a repetition request word is generated and transmitted to the other terminal. The other terminal detects the presence of the repetition request word in the received data and transmits a repetition start word and the last m data words stored in the memory to said one terminal to accomplish the error correction.
Inventors
- 👤 Jean Perrault
- 👤 Adelin E G Salle
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 07:20
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/004; H04L1/0056; H04L1/0057; G; G08; G08C; G08C25/00; G08C25/02; H04L1/0045; H04L1/0061; H04L1/08; H04L1/12
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
323 words
A bidirectional data transmission system including two teRminal stations in bidirectional communication with each other having error correction capability comprising: first means disposed in each of said stations to process data words before transmission and after reception; second means disposed in at least one of said stations to store the last m data words transmitted, where m is an integer greater than one; third means disposed in at least the other of said stations to receive said data words from said one of said stations and to detect errors in said received data words; fourth means disposed in at least said other of said stations coupled to said third means and said first means responsive to a detected error in said received data words to block said received data words from said first means and to provide for transmission to said one of said stations a repetition request word; and fifth means disposed in at least said one of said stations coupled to said second means responsive to said repetition request word received from said other of said stations to provide for transmission to said other of said stations for error correction therein a repetition start word and said last m data words; each of said data words, said repetition request words and said repetition start words including n1 information digits, where n1 is an integer greater than one, and n2 parity digits, where n2 is an integer greater than one; said third means including a parity computing circuit responsive to said n1 information digits to compute the parity thereof, an error detection circuit coupled to said computing circuit responsive to said n2 received parity digits and said computed parity to detect errors in said received words; and a repetition control circuit including a plural binary stage repetition counter, and a plural binary stage alarm counter, both of said counters advancing one count at each word time following the detection of an error.
Claim 2
Dependent Claim
323 words
A bidirectional data transmission system including two teRminal stations in bidirectional communication with each other having error correction capability comprising: first means disposed in each of said stations to process data words before transmission and after reception; second means disposed in at least one of said stations to store the last m data words transmitted, where m is an integer greater than one; third means disposed in at least the other of said stations to receive said data words from said one of said stations and to detect errors in said received data words; fourth means disposed in at least said other of said stations coupled to said third means and said first means responsive to a detected error in said received data words to block said received data words from said first means and to provide for transmission to said one of said stations a repetition request word; and fifth means disposed in at least said one of said stations coupled to said second means responsive to said repetition request word received from said other of said stations to provide for transmission to said other of said stations for error correction therein a repetition start word and said last m data words; each of said data words, said repetition request words and said repetition start words including n1 information digits, where n1 is an integer greater than one, and n2 parity digits, where n2 is an integer greater than one; said third means including a parity computing circuit responsive to said n1 information digits to compute the parity thereof, an error detection circuit coupled to said computing circuit responsive to said n2 received parity digits and said computed parity to detect errors in said received words; and a repetition control circuit including a plural binary stage repetition counter, and a plural binary stage alarm counter, both of said counters advancing one count at each word time following the detection of an error.
Claim 3
Dependent Claim
48 words
A system according to claim 1, wherein said one of said stations also includes said third means and said fourth means and said other of said stations also includes said second means and said fifth means to provide error correction capability for the other direction of data transmission.
Claim 4
Dependent Claim
110 words
A system according to claim 1, further including a first clock disposed in said one of said stations to control the transmission of words therefrom; a second clock disposed in said other of said stations synchronous with said first clock to control the transmission of words therefrom; and a third clock disposed in said one of said stations to control the reception of words therefrom, the timing signals of said third clock being identical to the timing signals of said first clock, but delayed with respect thereto an amount corresponding to the round trip propagation time between said stations plus the data processing time of said other of said stations.
Claim 5
Dependent Claim
38 words
A system according to claim 1, further including means to provide synchronizing words, and means to provide said synchronizing words for transmission in the absence of said data words, said repetition request words, and said repetition start words.
Claim 6
Dependent Claim
92 words
A system according to claim 1, wherein said fourth means includes sixth means responsive to said received words to distinguish between said data words and said repetition start words, seventh means coupled to said sixth means and said third means responsive to said detected error and an output signal from said sixth means to provide said repetition request word for transmission, and eighth means coupled to said sixth means and said third means responsive to another output signal from said sixth means to block said received data words from said first means.
Claim 7
Dependent Claim
56 words
A system according to claim 1, wherein said fifth means includes sixth means responsive to said received words to distinguish between said data words and said repetiTion request words, and seventh means coupled to said sixth means and said second means to provide for transmission of said repetition start word and said last m data words.
Claim 8
Dependent Claim
277 words
A system according to claim 1, wherein said fourth means includes sixth means responsive to said received words to distinguish between said data words and said repetition start words and produce a plurality of output signals, seventh means to said third and sixth means responsive to said detected error and one of said plurality of output signals to provide said repetition request word for transmission, and eighth means coupled to said sixth means and said third means responsive to a second one of said plurality of output signals to block said received data words from said first means; said third means includes a parity computing circuit responsive to said n1 information digits to compute the parity thereof. an error detection circuit coupled to said computing circuit responsive to said n2 received parity digits and said computed parity to detect errors in said received words, a repetition counter coupled to said detection circuit and said sixth means responsive to a detected error and a third one of said plurality of output signals to advance one count at each word time following the detection of an error, and an alarm counter coupled to said detection circuit and said sixth means responsive to a detected error and fourth and fifth ones of said plurality of output signals to advance one count at each word time following the detection of an error; and fifth means includes ninth means responsive to said received words to distinguish between said data words and said repetition request words, and tenth means coupled to said ninth means and said second means to provide for transmission of said repetition start word and said last m data words.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-02-07 | 1975-08-09 | 1976-02-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-02-07 | 1979-08-09 | 1980-02-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-02-07 | 1983-08-09 | 1984-02-08 | $7700.00 | Window Closed / Lapsed |