Generalized circuit

Claim 1

The combination comprising a semiconductor chip having mounted thereon active circuit elements, resistor passive circuit elements and means for iNterconnecting said elements for forming a generalized multifunction incomplete integrated circuit arrangement for producing electrical currents in response to input currents, said active circuit elements of said semiconductor chip include a plurality of parallel connected input gate diodes, a plurality of series connected first offset diodes, a driver transistor, an output transistor, a compensating diode, a steering transistor, a second offset diode and an isolation diode, said interconnecting means include an input terminal for each of said input diodes, bias terminals for said driver transistor and said output transistor, an output terminal, an input expansion and biasing terminal, a steering terminal, and junction terminals, said interconnecting means also includes conductive elements connecting the anodes of said gate diodes to a common junction in series with the anodes of said offset diodes, the base of said driver transistor with the cathodes of said offset diodes and to a first junction terminal, the base of said output transistor with the emitter of said driver transistor and to a second junction terminal, each of said input terminals to a cathode of said gate diodes, the collector of said driver transistor to a first bias terminal, the emitter of said output transistor to a second bias terminal, the collector of said output transistor to said output terminal, the anode of said compensating diode to the base of said driver transistor, the cathode of said compensating diode to a third junction terminal, the collector of said steering transistor to the base of said driver transistor, the base of said steering transistor to a fourth junction terminal, the anode of said second offset diode to the emitter of said steering transistor, the cathode of said second offset diode to the anode of said isolation diode and to said steering terminal, the cathode of said isolation diode to a fifth junction terminal, and said input expansion and biasing terminal to the junction of said gate diodes and said first offset diodes, said passive circuit elements include resistance elements connected between the emitter of said driver transistor and a sixth junction terminal and between the base of said output transistor and a seventh junction terminal, said semiconductor chip also including a plurality of conductive members distributed in a predetermined array about said semiconductor chip, means for connecting each of said terminals to a separate of said conductor members for forming inputs and outputs to said elements and for connecting additional conductive elements for crossover and crossunder networks; and a printed circuit board including a plurality of conductive lands in an array corresponding with the array of said conductive members and connected thereto in underlying fashion, printed circuit passive circuit elements disposed thereon, and printed circuit means for interconnecting said lands and said printed circuit passive elements and for providing a complete electronic circuit with said integrated circuit.