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US3633172A Expired / Lapsed US ⏱️ 0.0 years remaining

Means for and method of address-coded signaling

Assignee: Patelhold Patenverwertungs and Elektro-Holding AG
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Filing: 1970-01-13
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Granted: 1972-01-04
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Expires: 1990-01-13
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Abstract

Abstract In address-coded signaling, successive, contiguous and equal sections of an information signal at a transmitting station are time-compressed into discrete spaced information packets being time-position modulated in respect to equispaced time intervals in accordance with the address code of a receiving station being called by said transmitting station. An address evaluator cooperating with the received signal packets and the stored address code at the receiving station serves, upon coincidence of the received and stored address codes, to establish synchronism with the transmitting station and the received demodulated signal packets are in turn expanded, to restore the original continuous information signal.

Inventors

  • 👤 Fritz Eggimann
  • 👤 Gustav Guanella
  • 👤 Manfred Tiesnes
  • 👤 Ivan Wigdorovits

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 23:32
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/24; H04J3/26; H04J3/16; H04J3/1676; H04J3/18

Claims Analysis

Total Claims: 26
Claim 1
Independent Claim 115 words
A method of address-coded signaling comprising the steps of subdividing the information signal at the transmitter into contiguous signal sections of equal duration, converting said signal sections into short signal packets with the complete information content of the original information signal, whereby intervals occur between said signal packets, time-position modulating recurrent groups of said signal packets in accordance with the coded address of a receiver to be called, comparing a received address derived from said signal packets with a locally stored address code at the receiver, to synchronize the receiver with the transmitter upon coincidence of the received and locally stored address codes, and expanding the received signal packets to restore the original information signal.
Claim 2
Independent Claim 115 words
A method of address-coded signaling comprising the steps of subdividing the information signal at the transmitter into contiguous signal sections of equal duration, converting said signal sections into short signal packets with the complete information content of the original information signal, whereby intervals occur between said signal packets, time-position modulating recurrent groups of said signal packets in accordance with the coded address of a receiver to be called, comparing a received address derived from said signal packets with a locally stored address code at the receiver, to synchronize the receiver with the transmitter upon coincidence of the received and locally stored address codes, and expanding the received signal packets to restore the original information signal.
Claim 3
Dependent Claim 7 words
An address-coded signaling system comprising in combination:
Claim 4
Dependent Claim 7 words
An address-coded signaling system comprising in combination:
Claim 5
Dependent Claim 41 words
first means at said transmitting station to divide an information signal to be transmitted into contiguous signal sections of equal duration and to convert said signal sections into delayed time-compressed spaced signal packets containing the complete information of the original signal,
Claim 6
Dependent Claim 41 words
first means at said transmitting station to divide an information signal to be transmitted into contiguous signal sections of equal duration and to convert said signal sections into delayed time-compressed spaced signal packets containing the complete information of the original signal,
Claim 7
Dependent Claim 23 words
second means to time-position modulate recurrent groups of said signal packets according to the address code of said receiving station to be called,
Claim 8
Dependent Claim 23 words
second means to time-position modulate recurrent groups of said signal packets according to the address code of said receiving station to be called,
Claim 9
Dependent Claim 109 words
A signaling system as claimed in claim 2, wherein, in order to realize time compression of the information signal composed of signal sections (x1, x2 ...), said first means is comprised of first and second separate shift registers (SR1, SR2) first changeover switch means for receiving the information signal and alternately applying the signal sections in alternating sequence through said first changeover switch means (U1), output means, and second changeover switch means for alternately coupling the outputs of said registers to said output means whereby the contents of said registers are read out at accelerated speed through said second changeover switch means (U2) for transmission to the receiving station.
Claim 10
Dependent Claim 75 words
A signaling system as claimed in claim 3, further comprising means coupled to said registers for controlling the time delay between the beginning of a signal section and the beginning of a signal packet within said signal section wherein time-position modulation of the signal packets (z1, z2, ....) is achieved by a corresponding selection of the starting points of the accelerated readouts (delay times d1, d2, ....) of the signal packets from said shift registers.
Claim 11
Dependent Claim 8 words
address code storage means at said receiving station,
Claim 12
Dependent Claim 8 words
address code storage means at said receiving station,
Claim 13
Dependent Claim 27 words
receiving and comparison means at said receiving station, to compare the address code derived from the received signal packets with the address code of said storage means,
Claim 14
Dependent Claim 27 words
receiving and comparison means at said receiving station, to compare the address code derived from the received signal packets with the address code of said storage means,
Claim 15
Dependent Claim 123 words
A signaling system as claimed in claim 3, wherein the recovery of the original signal sections at the receiver is effected by said expander means which is further comprised of first and second shift registers and first and second changeover switch means of the same type as provided at the transmitter, and wherein the received signals are alternately applied to and read out from said registers by said first and second changeover switch means, respectively, in accordance with the same program as at the transmitter and with relatively rapid read-in and relatively slow readout, respectively, whereby said receiver read-in rate is equivalent to the readout rate of said transmitter and said receiver readout rate is equivalent to the read-in rate of the transmitter.
Claim 16
Dependent Claim 46 words
A signaling system as claimed in claim 1, wherein said first means further comprises delay control means including means for combining a plurality of signal packets into groups with constant time-position modulation of said packets within each group, to permit easy address recognition at the receiver.
Claim 17
Dependent Claim 26 words
third means associated with said comparison means to synchronize said transmitting station with said receiving station upon coincidence of the received and stored address codes, and
Claim 18
Dependent Claim 26 words
third means associated with said comparison means to synchronize said transmitting station with said receiving station upon coincidence of the received and stored address codes, and
Claim 19
Dependent Claim 17 words
means at said receiving station to expand the received signal packets, to restore the original information signal.
Claim 20
Dependent Claim 17 words
means at said receiving station to expand the received signal packets, to restore the original information signal.
Claim 21
Dependent Claim 136 words
A signaling system as claimed in claim 6, wherein said delay control means includes a programmer (PG1) serving to produce the group modulation and which is comprised of a shift register (S1) with selective tappings, means coupled to said shift register to cause a timing pulse passing periodically through said register to produce output pulses displaced in time by specific intervals (d1, d2 ...) in respect to equidistant normal time positions, said transmitter having a modulator (BM) means coupled to said register tappings to cause the program signal thus obtained to control said modulator (BM) for said signal packets of the transmitter, receiving and comparison means having a demodulator (BD), and further means at said receiver to cause a corresponding program signal to control said demodulator (BD) at the receiver, to recover the original information signals.
Claim 22
Dependent Claim 88 words
A signaling system as claimed in claim 6, further including an address evaluator (BA) at said receiver in the form of a shift register (S2) with adjustable tappings, to which are applied the signal packets; a second programmer (PG2) at said receiver; said receiving and comparison means including means for comparing the time occurrences of the output of said second programmer and said address evaluator and which serves for the address recognition and synchronization of a programmer (PG2) at the receiver corresponding to the programmer at the transmitter.
Claim 23
Dependent Claim 181 words
A signaling system as claimed in claim 8, further including a coincidence circuit and a switch (W) each coupled to the taps of the address evaluator (BA) which are set according to the program displacements (d1, d2 ...), to deliver an output pulse (e0) released by a signal packet group from said address evaluator for initiating a timing pulse (e2) which produces the next program pulse group of the second programmer (PG2) at the receiver via switch (W), said switch connecting, in its first position, the output of said coincidence circuit to the input of the programmer shift register (S3) at the receiver and said switch connecting, in its second position, the output to the input of said last register, and to AND-circuit (K), whereby, as soon as coincidence between the next coincidence pulse (eo) and the timing pulse (e2) has been established by said AND circuit, said switch is operated by said AND circuit into its second (feedback) position of the programmer shift register (S3) and the programmer (PG2) continues to run independently regardless of accidental disturbances of the transmission.
Claim 24
Dependent Claim 55 words
A signaling system as claimed in claim 2, further comprising a sequence generaTor coupled to said first means for providing an additional time-position modulation program which is superimposed upon the basic program of the signal packet time-position modulation, the repetition frequency of said additional program being less than the repetition frequency of said basic program.
Claim 25
Dependent Claim 33 words
A signaling system as claimed in claim 10, wherein said sequence generator includes means for generating a plurality of short addresses the sequence of which is controlled in accordance with the additional program.
Claim 26
Dependent Claim 57 words
A signaling system as claimed in claim 11, wherein said receiver is provided with a sequence pulse generator identical to that provided at the transmitter, said receiver sequence generator being coupled to said second programmer and responsive to said address evaluator to alter the sequence in accordance with the manner of alteration provided at the transmitter station.

References Cited (Backward Citations)

US3299411A Cited
US3310786A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-01-03 1975-07-05 1976-01-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-01-03 1979-07-05 1980-01-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-01-03 1983-07-05 1984-01-04 $7700.00 Window Closed / Lapsed

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