US3633165A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Analog data transmission system
Assignee: Applied Dynamics Inc
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Filing: 1969-12-15
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Granted: 1972-01-04
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Expires: 1989-12-15
Abstract
Abstract A multiplicity of remote analog signal-transmitting devices which time share a direct-current analog bus each include electronic switching within a feedback amplifier loop so that loop gain removes error due to switch voltage drop. Operation of the electronic switching when a given amplifier is not controlling the bus isolates the amplifier terminal connected to the bus from any power supply or signal voltages of the amplifier and allows the amplifier to present a high impedance load to any other signal-transmitting device then controlling the bus.
Inventors
- 👤 Edward O Gilbert
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 03:27
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/72; H04; H04J; H04J3/00; H04J3/02; H04J3/04; H04J3/047
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
235 words
An analog signal multiplexing system, comprising, in combination: a plurality of analog signal-deriving means; a bus conductor; means for providing logic signals to selectively control said analog signal-deriving means to apply successive analog signals from successive ones of said signal-deriving means to said bus conductor, each of said analog signal-deriving means including means for deriving a respective first analog signal and an output amplifier, said output amplifier having an input circuit connected to receive and combine said analog signal and a feedback signal to provide a second signal, first amplifying means for amplifying said second signal, an amplifier output terminal connected to said bus conductor, a first transistor having its collector-emitter circuit connected between said amplifier output terminal and a first terminal of a power supply, a second transistor having its collector-emitter circuit connected between said amplifier output terminal and a second terminal of said power supply, first switching means responsive to one of said logic signals for selectively either applying the output signal from said first amplifying means to the base of said first transistor or cutting off said first transistor, second switching means responsive to one of said logic signals for selectively either applying a predetermined current to the base of said second transistor or cutting off said second transistor, and a feedback impedance connected between said amplifier output terminal and said input circuit to apply said feedback signal to said input circuit.
Claim 2
Dependent Claim
235 words
An analog signal multiplexing system, comprising, in combination: a plurality of analog signal-deriving means; a bus conductor; means for providing logic signals to selectively control said analog signal-deriving means to apply successive analog signals from successive ones of said signal-deriving means to said bus conductor, each of said analog signal-deriving means including means for deriving a respective first analog signal and an output amplifier, said output amplifier having an input circuit connected to receive and combine said analog signal and a feedback signal to provide a second signal, first amplifying means for amplifying said second signal, an amplifier output terminal connected to said bus conductor, a first transistor having its collector-emitter circuit connected between said amplifier output terminal and a first terminal of a power supply, a second transistor having its collector-emitter circuit connected between said amplifier output terminal and a second terminal of said power supply, first switching means responsive to one of said logic signals for selectively either applying the output signal from said first amplifying means to the base of said first transistor or cutting off said first transistor, second switching means responsive to one of said logic signals for selectively either applying a predetermined current to the base of said second transistor or cutting off said second transistor, and a feedback impedance connected between said amplifier output terminal and said input circuit to apply said feedback signal to said input circuit.
Claim 3
Dependent Claim
89 words
A system according to claim 1 wherein said first transistor is connected to be biased in a nonconducting condition in the absence of a signal being applied to its base by said first switching means, and wherein said second transistor is connected to be biased in a nonconducting condition in the absence of said predetermined current being applied to its base, whereby when said transistors are both in a nonconducting condition said feedback impedance comprises the only load connected to said bus conductor by a given analog signal-deriving means.
Claim 4
Dependent Claim
67 words
A system according to claim 1 having first and second unidirectional-conducting means respectively connected between said amplifier output terminal and the collector-emitter circuits of said first and second transistors, thereby preventing a voltage on said bus conductor from causing base current flow in either of said transistors when said first switching means cuts off said first transistor and said second switching means cuts off said second transistor.
Claim 5
Dependent Claim
62 words
A system according to claim 1 in which said first switching means comprises resistance means connected between said first amplifying means and the base of said first transistor and a third transistor connected as a shunt switch controlled by one of said logic signals to cut off said first transistor by shorting one end of said resistance means to a predetermined potential.
Claim 6
Dependent Claim
77 words
A system accordiNg to claim 1 in which said first switching means includes a resistance, a third transistor and a fourth transistor, said resistance and the collector-emitter circuit of said third transistor being connected in series between said first amplifying means and the base of said first transistor, the collector-emitter circuit of said fourth transistor being connected between a point of reference potential and the junction between said resistance and the collector-emitter circuit of said third transistor.
Claim 7
Dependent Claim
172 words
An amplifier operable controllable by logic signals to either provide an output analog signal on an output conductor or to present a high impedance to said output conductor, comprising, in combination: direct-coupled first amplifying means connected to receive an input signal and a feedback signal and to provide a second signal; a first transistor having its collector-emitter circuit connected between said output conductor and a first terminal of a power supply; a second transistor having its collector-emitter circuit connected between said output conductor and a second terminal of said power supply; first switching means controlled by one of said logic signals for selectively applying or not applying the output signal from said first amplifying means to the base of said first transistor; second switching means controlled by one of said logic signals for selectively applying or not applying a predetermined current to the base of said second transistor; and a feedback impedance connected between said output conductor and said first amplifying means to apply said feedback signal to said first amplifying means.
Claim 8
Dependent Claim
172 words
An amplifier operable controllable by logic signals to either provide an output analog signal on an output conductor or to present a high impedance to said output conductor, comprising, in combination: direct-coupled first amplifying means connected to receive an input signal and a feedback signal and to provide a second signal; a first transistor having its collector-emitter circuit connected between said output conductor and a first terminal of a power supply; a second transistor having its collector-emitter circuit connected between said output conductor and a second terminal of said power supply; first switching means controlled by one of said logic signals for selectively applying or not applying the output signal from said first amplifying means to the base of said first transistor; second switching means controlled by one of said logic signals for selectively applying or not applying a predetermined current to the base of said second transistor; and a feedback impedance connected between said output conductor and said first amplifying means to apply said feedback signal to said first amplifying means.
Claim 9
Dependent Claim
29 words
An amplifier according to claim 6 having first and second unidirectional conducting means connected respectively between said output conductor and the collector-emitter circuits of said first and second transistors.
Claim 10
Dependent Claim
19 words
An amplifier according to claim 6 having diode means connected between the base and emitter of said second transistor.
Claim 11
Dependent Claim
19 words
An amplifier according to claim 6 in which said first and second transistors are of mutually opposite conductivity types.
Claim 12
Dependent Claim
45 words
An amplifier according to claim 6 having a first resistance connected between the base of said first transistor and said first terminal of said power supply, and second resistance connected between the base of said second transistor and said second terminal of said power supply.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-01-03 | 1975-07-05 | 1976-01-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-01-03 | 1979-07-05 | 1980-01-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-01-03 | 1983-07-05 | 1984-01-04 | $7700.00 | Window Closed / Lapsed |