System for reproducibly storing digital data

Claim 2

In a circuit for processing bivalued digital signals for recording; first means connected to be responsive to digital signals having first value for modulo-two counting digits as represented by the digital signals having the first value, by alternating between first and second count states; second means providing timing signals in representation of recording of bit frame boundaries and midframe points in time; third means having first or second state and changing state in response to control signals; and fourth means connected to the third means to provide thereto the control signals, further connected to the first and second means and receiving the digital signals, and providing the control signal in response to the digital signals respectively at bit frame boundary when the digital signal has first value and the first means is in the second state or when the digital signal has second value and the first means is the first state, and at a midframe point when the first means is in the second state and the digital signal has second value.

Claim 3

In a circuit as set forth in claim 1, including fifth means which includes the second means and responsive to current, preceding and succeeding digits, to shift the timing of a control signal causing the third means to change state if sequential changes between the first and second states of the third means having unequal duration, the shifting to extend the longer one and to correspondingly shorten the shorter one of the durations.

Claim 4

In a system for reproducibly storing digital data on a continuous storage surface, comprising: first means coupled to the storage surface and responsive to digital data to be stored to provide a particular characteristic on the storage surface on the leading or the trailing digit frame boundary on the surface for a digit of the first value, if a particular characteristic was not or was placed on the leading frame boundary of the preceding frame, and for digits of the second values, on the trailing boundary of a digit frame if a particular characteristic was recorded at the beginning boundary of that frame, and in the middle of a digit frame for each digit of the second value if there is no particular characteristics on the leading boundary of that frame; and second means coupled to the surface and responsive to the spacing between sequential particular characteristics and distinguishing the recorded bits in dependence of occurrence of a reproduced particular characteristics a full, one and one-half or two bit frame periods after the respective preceding, reproduced particular characteristics.

Claim 5

In a system for reproducibly storing digital data on a continuous storage surface, comprising: first means coupled to the storage surface and responsive to digital data to be stored to provide a particular characteristic on the storage surface on the leading or the trailing digit frame boundary on the surface for a digit of the first value, if a particular characteristic was not or was placed on the leading frame boundary of the preceding frame, and for digits of the second values, on the trailing boundary of a digit frame if a particular characteristic was recorded at the beginning boundary of that frame, and in the middle of a digit frame for each digit of the second value if there is no particular characteristics on the leading boundary of that frame; and second means coupled to the surface and responsive to the spacing between sequential particular characteristics and distinguishing the recorded bits in dependence of occurrence of a reproduced particular characteristics a full, one and one-half or two bit frame periods after the respective preceding, reproduced particular characteristics.

Claim 6

In a system for storing digital data having first and second values individually in frames on a movable storage carrier and which includes means for placing transitions on and reproducing such transitions from the carrier, the combination comprising: first means for selectively controlling the timing and placing of transitions on leading or trailing boundary of a bit frame in response to a digit of the first value, and on both boundaries of a bit frame or the center thereof in response to digits of the second value; and second means responsive to the timing as between reproduced transitions to reproduce the digital signals by distinguishing delays between respective two reproduced transitions by about one, one and one-half or two bit frame periods.

Claim 7

In a system for storing digital data having first and second values individually in frames on a movable storage carrier and which includes means for placing transitions on and reproducing such transitions from the carrier, the combination comprising: first means for selectively controlling the timing and placing of transitions on leading or trailing boundary of a bit frame in response to a digit of the first value, and on both boundaries of a bit frame or the center thereof in response to digits of the second value; and second means responsive to the timing as between reproduced transitions to reproduce the digital signals by distinguishing delays between respective two reproduced transitions by about one, one and one-half or two bit frame periods.

Claim 8

In a system as set forth in claim 4, the second means including, means (a) for modulo-two counting sequential occurrences of delays of one and a half bit frame periods and providing first and second count state signals; means (b) to provide a first signal in representation of a first digit in response to a delay between reproduced transitions when exceeding the bit frame period during the first count state of the means (a) and a second signal in representation of a first digit upon a metered delay of two bit frame periods or of one and a half bit frame periods in the second count state of the means (a); and means (c) to provide a signal in representation of a second digit in response to a delay between reproduced transitions of one bit frame period or a delay of one and a half bit frame periods in the first count state of the means (a).

Claim 9

In a system as set forth in claim 4, the first means selecting for recording of digits of the first and second values among two different configurations available for each, and including means (a) for modulo-two counting digits of the first value for controlling the particular placement of transitions in response to the digital signals and means (b) responsive to the counting of the means (a) for alternating between the two configurations for placement of transitions for recording sequential digits of the first value, and for selecting the particular configuration of transitions for digits of the second value in response to the count state of the means (a).

Claim 10

In a system for sorting signals representing digits having first or second value in sequential digit frames on a magnetic storage carrier; first means connected to be responsive to digits of the first value and controlling a flux change on a digit frame boundary for every second digit of the first value; and second means connected to be responsive to digits of the second value and connected to the first means to control a flux change on a digit frame boundary if the first or second means provided a flux change on the respective preceding digit frame boundary, and to control a flux change in about the middle of a frame in the absence of providing of a flux change on the preceding digit frame boundary.

Claim 11

In a system for sorting signals representing digits having first or second value in sequential digit frames on a magnetic storage carrier; first means connected to be responsive to digits of the first value and controlling a flux change on a digit frame boundary for every second digit of the first value; and second means connected to be responsive to digits of the second value and connected to the first means to control a flux change on a digit frame boundary if the first or second means provided a flux change on the respective preceding digit frame boundary, and to control a flux change in about the middle of a frame in the absence of providing of a flux change on the preceding digit frame boundary.

Claim 12

In a system as set forth in claim 7, including means to shift the providing of the flux change from the middle of a frame to an earlier or later time within the frame if the respective preceding flux change occurred at a shorter period, from the middle of a frame than the respective succeeding flux change is expected to occur.

Claim 13

In a system where digital data are recorded on a magnetic storage carrier as flux changes on the center of a bit frame or on one or both bit frame boundaries; first means responsive to the flux changes to provide a train of pulses representative thereof, the time of a pulse relative to the respective preceding pulse representing the spacing between flux changes on the carrier; second means responsive to occurrence of a pulse of the train during one of three consecutive periods following the respective preceding pulse of the train; and third means operated by the second means to provide a signal in representation of a digit of the first value where a pulse occurred in the earliest one of the three periods, to provide two signals in representation of two digits of the second value when a pulse occurred in the latest one of the three periods and to provide a digit of the second value when a pulse occurred in the middle one of the three periods and including means to provide an additional digit of the first value for every other pulse occurring in the middle period.

Claim 14

In a system where digital data are recorded on a magnetic storage carrier as flux changes on the center of a bit frame or on one or both bit frame boundaries; first means responsive to the flux changes to provide a train of pulses representative thereof, the time of a pulse relative to the respective preceding pulse representing the spacing between flux changes on the carrier; second means responsive to occurrence of a pulse of the train during one of three consecutive periods following the respective preceding pulse of the train; and third means operated by the second means to provide a signal in representation of a digit of the first value where a pulse occurred in the earliest one of the three periods, to provide two signals in representation of two digits of the second value when a pulse occurred in the latest one of the three periods and to provide a digit of the second value when a pulse occurred in the middle one of the three periods and including means to provide an additional digit of the first value for every other pulse occurring in the middle period.

Claim 15

In a circuit for converting digital signals having first or second values and represented in NRZ code into a self-clocking code for storage, transmission or the like, with at least one level change to be provided per two digital digits comprising: first means capable of assuming first and second states and changing state in response to control signals applied to an input of the first means; timing means provided essentially regularly spaced timing signals at twice the digital data rate of the digital signals, the timing signals comprising alternating first and second signals; second means responsive to the digital signals and modulo-two counting the digital signals of first value, and alternating between first and second count state accordingly; and third means connected to the timing means to the second means and to the first means and further connected to receive the digital signals, to provide control signals to the input of the first means in response to the first timing signals when the second means is in the first state and the digital signal has second value as well as when the second means is in the second state and the digital signal has first value, and to provide control signals to the input of the first means in response to the second timing signals when the digital signal has the second value and the second means is in the second state.

Claim 16

In a circuit for converting digital signals having first or second values and represented in NRZ code into a self-clocking code for storage, transmission or the like, with at least one level change to be provided per two digital digits comprising: first means capable of assuming first and second states and changing state in response to control signals applied to an input of the first means; timing means provided essentially regularly spaced timing signals at twice the digital data rate of the digital signals, the timing signals comprising alternating first and second signals; second means responsive to the digital signals and modulo-two counting the digital signals of first value, and alternating between first and second count state accordingly; and third means connected to the timing means to the second means and to the first means and further connected to receive the digital signals, to provide control signals to the input of the first means in response to the first timing signals when the second means is in the first state and the digital signal has second value as well as when the second means is in the second state and the digital signal has first value, and to provide control signals to the input of the first means in response to the second timing signals when the digital signal has the second value and the second means is in the second state.

Claim 17

In a system for reproducing digital data; first means connected to be responsive to recorded half-waves of a first frequency; second means connected to be responsive to recorded half-waves of a second frequency half the first frequency; third means connected to be responsive to recorded half-waves of a third frequency in between the first and second frequency; fourth means connected to the first means to interpret response of the first means as at least one bit of a first value; fifth means connected to the second means to interpret response of the second means as a pair of bits of a second value; and sixth means connected to be responsive to response of the third means to interpret the response as a pair of dissimilAr bits of first and second values.

Claim 18

In a system for reproducing digital data; first means connected to be responsive to recorded half-waves of a first frequency; second means connected to be responsive to recorded half-waves of a second frequency half the first frequency; third means connected to be responsive to recorded half-waves of a third frequency in between the first and second frequency; fourth means connected to the first means to interpret response of the first means as at least one bit of a first value; fifth means connected to the second means to interpret response of the second means as a pair of bits of a second value; and sixth means connected to be responsive to response of the third means to interpret the response as a pair of dissimilAr bits of first and second values.

Claim 19

In a system where digital signals have been recorded on a magnetic storage surface by placing a flux reversal at the beginning or the end of a frame boundary in representation of a digital signal of a first one of two values, and by placing a flux reversal in the middle of or on both boundaries of a frame in representation of a digital signal having the second one of the two values, and wherein each reproduced flux reversal is represented by a pulse, the combination comprising: first means connected to be responsive to a pulse occurring during a first period after the respective preceding pulse; second means connected to be responsive to a pulse occurring during a second period after the respective preceding pulse, the second period occurring after the first period; third means connected to be responsive to a pulse occurring during a third period after the respective preceding pulse, the third period occurring after the second period; fourth means connected to be responsive to the first means to provide digital signals of the second value; fifth means connected to be responsive to the third means to provide digital signals of the first value; and means selectively operating to alternatingly provide signals of the first and second values in response to sequential responses of the second means.

Claim 20

In a system where digital signals have been recorded on a magnetic storage surface by placing a flux reversal at the beginning or the end of a frame boundary in representation of a digital signal of a first one of two values, and by placing a flux reversal in the middle of or on both boundaries of a frame in representation of a digital signal having the second one of the two values, and wherein each reproduced flux reversal is represented by a pulse, the combination comprising: first means connected to be responsive to a pulse occurring during a first period after the respective preceding pulse; second means connected to be responsive to a pulse occurring during a second period after the respective preceding pulse, the second period occurring after the first period; third means connected to be responsive to a pulse occurring during a third period after the respective preceding pulse, the third period occurring after the second period; fourth means connected to be responsive to the first means to provide digital signals of the second value; fifth means connected to be responsive to the third means to provide digital signals of the first value; and means selectively operating to alternatingly provide signals of the first and second values in response to sequential responses of the second means.

Claim 21

In a circuit for storing sequentially provided digital signals having first and second values, individually in frames on a movable storage carrier; first means for selectively providing control signals in representation of frame boundaries and of the respective center of the frame; second means responsive to first bit values and selectively inhibiting and enabling the providing of a control signal by the first means at a frame boundary in respective dependence upon presence and absence of a control signal at the respective preceding frame boundary; third means responsive to second bit values for selectively enabling the providing of a control signal representing a frame boundary or a frame center in respective dependence upon presence or absence of a frame boundary control signal at the preceding boundary; and means responsive to the control signals to provide storage in representation thereof in the storage carrier.

Claim 22

In a circuit for storing sequentially provided digital signals having first and second values, individually in frames on a movable storage carrier; first means for selectively providing control signals in representation of frame boundaries and of the respective center of the frame; second means responsive to first bit values and selectively inhibiting and enabling the providing of a control signal by the first means at a frame boundary in respective dependence upon presence and absence of a control signal at the respective preceding frame boundary; third means responsive to second bit values for selectively enabling the providing of a control signal representing a frame boundary or a frame center in respective dependence upon presence or absence of a frame boundary control signal at the preceding boundary; and means responsive to the control signals to provide storage in representation thereof in the storage carrier.

Claim 23

In a system for encoding digital information for recording, transmission or the like: first means providing for oscillations composed of coherent half-waves of alternating polarity, a half-wave selectively having first, second or third frequency; and means operating the first means for obtaining the oscillations, including, second means responsive to the immediately preceding providing of a half-wave of first or third frequency, to selectively provide a half-wave of first frequency in representation of a pair of similar sequential digits of second value, a half-wave of third frequency, in representation of a single digit of first value, or a half-wave of second frequency in representation of a pair of sequential dissimilar digits, the first one having second value, third means responsive to the immediately preceding providing of a half-wave of second frequency in representation of two dissimilar digits, the second one having second value to provide a half-wave of first, second or third frequency respectively in representation of two similar digits of second value, of two dissimilar bits, the first one having second value, or of a digit of first value, and fourth means responsive to the immediately preceding providing of a half-wave of the second frequency in representation of two dissimilar digits, the second one thereof having first value, to provide a half-wave of second or third frequency respectively in representation of a bit of second or first value.

Claim 24

In a system for encoding digital information for recording, transmission or the like: first means providing for oscillations composed of coherent half-waves of alternating polarity, a half-wave selectively having first, second or third frequency; and means operating the first means for obtaining the oscillations, including, second means responsive to the immediately preceding providing of a half-wave of first or third frequency, to selectively provide a half-wave of first frequency in representation of a pair of similar sequential digits of second value, a half-wave of third frequency, in representation of a single digit of first value, or a half-wave of second frequency in representation of a pair of sequential dissimilar digits, the first one having second value, third means responsive to the immediately preceding providing of a half-wave of second frequency in representation of two dissimilar digits, the second one having second value to provide a half-wave of first, second or third frequency respectively in representation of two similar digits of second value, of two dissimilar bits, the first one having second value, or of a digit of first value, and fourth means responsive to the immediately preceding providing of a half-wave of the second frequency in representation of two dissimilar digits, the second one thereof having first value, to provide a half-wave of second or third frequency respectively in representation of a bit of second or first value.

Claim 25

In a circuit for processing digital signals for recording on a magnetic storage surface by placing flux reversals thereon, the spacing between sequential flux reversals being of digital significance, the combination comprising: first means disposed in relation to the storage surface to provide thereto magnetization including the controlled placement of flux reversals; second means connected to the first means and responsive to the digital signals to be recorded for controlling the placement of flux reversals by the first means; timing means included in the second means to control the timing of the placement in representation of the digits represented by the digital signals so that a difference in the delays between any two sequential transitions so placed being of digital significance; and means responsive to the digital signals to distort the timing as provided by operation of the second means to increase the amount of inequality as between two unequal, immediately succeeding delays as respectively defined between sequential pairs of reversals.

Claim 26

In a circuit for processing digital signals for recording on a magnetic storage surface by placing flux reversals thereon, the spacing between sequential flux reversals being of digital significance, the combination comprising: first means disposed in relation to the storage surface to provide thereto magnetization including the controlled placement of flux reversals; second means connected to the first means and responsive to the digital signals to be recorded for controlling the placement of flux reversals by the first means; timing means included in the second means to control the timing of the placement in representation of the digits represented by the digital signals so that a difference in the delays between any two sequential transitions so placed being of digital significance; and means responsive to the digital signals to distort the timing as provided by operation of the second means to increase the amount of inequality as between two unequal, immediately succeeding delays as respectively defined between sequential pairs of reversals.

Claim 27

In a system for recording digital data having first or second digit values on a magnetic storage surface, comprising: first means operating in response to production of a flux reversal on a bit frame boundary to selectively provide a flux reversal on the next bit frame boundary in response to a digit of first value, in the middle of frame succeeding the next bit frame boundary in response to a digit of second value and a succeeding digit of the first value, and on the bit frame boundary thereafter in response to two sequential digits of the second value; and second means included in the first means and operating in response to production of a flux reversal in the middle of a frame to selectively provide a flux reversal in the middle of the next frame in response to a digit of the first value, and on the end boundary of the next frame in response to a digit of the second value.

Claim 28

In a system for recording digital data having first or second digit values on a magnetic storage surface, comprising: first means operating in response to production of a flux reversal on a bit frame boundary to selectively provide a flux reversal on the next bit frame boundary in response to a digit of first value, in the middle of frame succeeding the next bit frame boundary in response to a digit of second value and a succeeding digit of the first value, and on the bit frame boundary thereafter in response to two sequential digits of the second value; and second means included in the first means and operating in response to production of a flux reversal in the middle of a frame to selectively provide a flux reversal in the middle of the next frame in response to a digit of the first value, and on the end boundary of the next frame in response to a digit of the second value.