US3631270A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Active all-pass network for phase equalizers
Assignee: AG Communication Systems Corp
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Filing: 1970-12-03
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Granted: 1971-12-28
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Expires: 1990-12-03
Abstract
Abstract An all-pass system particularly adapted for equalizing group delay distortion in wide band communication systems. Two common emitter stages having adjustable resonant circuits are arranged in parallel to receive a single input and to linearly combine the outputs of the stages. One stage is wide band and the other is frequency selective and the output of the selective stage is twice the amplitude of the wide band stage and phase inversion is provided such that the outputs of the two stages are 180* apart.
Inventors
- 👤 James J Heinemann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 22:44
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/02; H03H11/16; H03H11/18
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
144 words
An all-pass system for phase adjustment comprising a. input means adapted to receive input signals, b. first and second stages connected in parallel to said input means for receiving signals therefrom and each comprising a common emitter transistor circuit, c. the first of said stages being wide band and the second of said stages being frequency selective with at least one adjustable resonant circuit in the emitter circuit of said second stage, d. means establishing the output of said second stage at twice the amplitude of the output of said first stage and maintaining the outputs of the two stages out of phase, and e. a common load connected to the outputs of said first and second stages for linear addition of such outputs as a single phase adjusted output of said system as adjusted by the setting of said second stage resonant circuit.
Claim 2
Dependent Claim
144 words
An all-pass system for phase adjustment comprising a. input means adapted to receive input signals, b. first and second stages connected in parallel to said input means for receiving signals therefrom and each comprising a common emitter transistor circuit, c. the first of said stages being wide band and the second of said stages being frequency selective with at least one adjustable resonant circuit in the emitter circuit of said second stage, d. means establishing the output of said second stage at twice the amplitude of the output of said first stage and maintaining the outputs of the two stages out of phase, and e. a common load connected to the outputs of said first and second stages for linear addition of such outputs as a single phase adjusted output of said system as adjusted by the setting of said second stage resonant circuit.
Claim 3
Dependent Claim
27 words
The all-pass system of claim 1 further defined by said means (d) being incorporated into said input means (a) as a split load phase inverter transistor circuit.
Claim 4
Dependent Claim
62 words
The all-pass system of claim 1 further defined by the input means (a) including the means (d) and comprising a transformer having one winding connected between an input terminal and one of said stages and the other winding being oppositely wound for reversing polarity and connected to the other of said stages, the turns ratio of said windings establishing said amplitude relationship.
Claim 5
Dependent Claim
41 words
The all-pass system of claim 1 further defined by said means (d) comprising a transformer connected to the output of one of said stages and having oppositely poled windings for said phase reversal and a turns ratio establishing said amplitude relationship.
Claim 6
Dependent Claim
51 words
The all-pass system of claim 2 further defined by the value of resistors in the input transistor circuit being in predetermined relation to the value of resistors in the first stage transistor circuit to apply one half the amplitude signal to the first stage as is applied to the second stage.
Claim 7
Dependent Claim
36 words
The all-pass system of claim 1 further defined by said second stage having a plurality of n resonant circuits and the phase difference between the second stage output and the first stage output being 180* .
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-12-27 | 1975-06-28 | 1975-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-12-27 | 1979-06-28 | 1979-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-12-27 | 1983-06-28 | 1983-12-28 | $7700.00 | Window Closed / Lapsed |