Intrinsically safe electrical barrier system and improvements therein

Claim 2

An intrinsic safety barrier combination, said combination including individual barriers for transmitting electrical energy applied thereto; an electrical energy selector connected to said individual barriers for selecting the one of said individual barriers transmitting the highest level electrical energy; and a master barrier connected to said selector for having said highest level electrical energy applied to said master barrier by said selector; said master barrier being responsive to said highest level electrical energy for preventing said one of said individual barriers from transmitting electrical energy above a predetermined level.

Claim 3

The intrinsic safety barrier combination of claim 1, wherein said individual barriers are responsive to voltage of said electrical energy applied thereto so as to limit energy transmitted thereby when said voltage exceeds a predetermined level; said selector being responsive to voltage for connecting said one of said individual barriers to said master barrier, and said master barrier being responsive to voltage to limit the amount of said electrical energy transmitted by said one of said individual barriers, when the voltage of the last said electrical energy exceeds a predetermined level.

Claim 4

The intrinsic safety barrier combination of claim 1, wherein said individual barriers form parts of closed loops carrying electrical currents transmitted by said individual barriers, and are responsive to voltage of said currents for diverting electrical current from the corresponding loops when said voltage exceeds a predetermined level; said master barrier also being responsive to voltage for diverting part of said current from one of said loops of which said one of said individual barriers forms a part, when the voltage of the last said current exceeds a predetermined level.

Claim 5

An intrinsic safety barrier combination, said combination including a first barrier, a second barrier, and a third barrier, each having an input and an output, and a high voltage selector having inputs and an output; said first barrier''s said output being connected to one of said selector''s said inputs, said second barrier''s said output being connected to another of said selector''s said inputs, and said third barrier''s said input being connected to said selector''s said output; said first barrier and said second barrier each having the property of conducting current between its input and its output, and the property of limiting voltage and current at its output; said high voltage selector having the property of providing, at its said output, current from that one of said first and second barriers having the highest of the voltages at the corresponding output; said third barrier having the property of conducting current between its said input and said output when and only when the voltage at its said input attains a given value.

Claim 6

An intrinsic safety barrier combination, said combination including a first barrier, a second barrier, and a third barrier, each having an input and an output, and a high voltage selector having inputs and an output; said first barrier''s said output being connected to one of said selector''s said inputs, said second barrier''s said output being connected to another of said selector''s said inputs, and said third barrier''s said input being connected to said selector''s said output; said first barrier and said second barrier each having the property of conducting current between its input and its output, and the property of limiting voltage and current at its output; said high voltage selector having the property of providing, at its said output, current from that one of said first and second barriers having the highest of the voltages at the corresponding output; said third barrier having the property of conducting current between its said input and said output when and only when the voltage at its said input attains a given value.

Claim 7

The intrinsic safety barrier combination of claim 4, wherein at least one of said first and second barriers has current-sensitive resistance connected between its said input and output for conducting the corresponding said current, said resistance being sensitive to current for limiting said corresponding said current.

Claim 8

The intrinsic safety barrier combination of claim 5, wherein said resistance comprises interelectrode resistance of transistor means.

Claim 9

The intrinsic safety barrier combination of claim 5, wherein said resistance comprises interelectrode resistance of bipolar transistor means.

Claim 10

The intrinsic safety barrier combination of claim 5, wherein said resIstance comprises interelectrode resistance of FET means.

Claim 11

The intrinsic safety barrier combination of claim 5, wherein said resistance comprises emitter-collector resistance of a self-biased bipolar transistor.

Claim 12

The intrinsic safety barrier combination of claim 5, wherein said resistance comprises source-drain resistance of a self-biased FET.

Claim 13

The intrinsic safety barrier combination of claim 5, wherein said resistance comprises interelectrode resistances in series of two bipolar transistors.

Claim 14

The intrinsic safety barrier combination of claim 5, wherein said resistance comprises interelectrode resistances in series of two FET''s.

Claim 15

The intrinsic safety barrier combination of claim 4 in further combination with means connected to said outputs of said first and second barriers and providing loads for current from said first and second barriers, said loads and said output of said third barrier being connected to common terminal means; and also in combination with further means connected to said common terminal means and said inputs of said first and second barriers and providing electrical energy for producing said currents in said barriers.

Claim 16

An intrinsic safety barrier combination, said combination including a first zener diode, a second zener diode and a third zener diode; a first resistance and a second resistance, said first resistance being connected to one electrode of said first zener diode, and said second resistance being connected to one electrode of said second zener diode; a high voltage selector having a first input and a second input, and an output, for providing at its said output the higher of the voltages applied simultaneously at its said inputs, said first input being connected to said one electrode of said first zener diode, said second input being connected to said one electrode of said second zener diode, and said output being connected to one electrode of said third zener diode; each said one electrode being like in polarity to its fellow said one electrode, and the zener voltage of said third zener diode being less than those of said first and second zener diodes.

Claim 17

An intrinsic safety barrier combination, said combination including a first zener diode, a second zener diode and a third zener diode; a first resistance and a second resistance, said first resistance being connected to one electrode of said first zener diode, and said second resistance being connected to one electrode of said second zener diode; a high voltage selector having a first input and a second input, and an output, for providing at its said output the higher of the voltages applied simultaneously at its said inputs, said first input being connected to said one electrode of said first zener diode, said second input being connected to said one electrode of said second zener diode, and said output being connected to one electrode of said third zener diode; each said one electrode being like in polarity to its fellow said one electrode, and the zener voltage of said third zener diode being less than those of said first and second zener diodes.

Claim 18

The intrinsic safety barrier combination of claim 14, wherein said first resistance includes a first fuse means, and said second resistance includes second fuse means.

Claim 19

The intrinsic safety barrier combination of claim 14, and including a fourth zener diode and an SCR, said fourth zener diode having one electrode connected to said one electrode of said third zener diode, said SCR having one electrode connected to said one electrode of said third zener diode, said SCR having a second electrode connected to the other electrode of said fourth zener diode, and said SCR having its remaining electrode connected to the other electrode of said fourth zener diode; said second electrode of said SCR being its gate, said one electrode of said fourth zener diode, and said remaining electrode of said SCR being like in polarity to said one electrode of said third zener diode, and the zener voltage of said fourth zener diode being larger than the zener voltages of said first and second electrodes.

Claim 20

The intrinsic safety barrier combination of claim 16, wherein said first resistance includes first fuse means and said second resistance includes second fuse means.

Claim 21

The intrinsic safety barrier combination of claim 14, including a three-electrode transistor having a self-bias circuit for causing it to appear to be a current-sensitive resistance between two of its electrodes, said current-sensitive resistance being connected as a current-limiting resistance to said one electrode of said first zener diode for defining a third resistance.

Claim 22

The intrinsic safety barrier of claim 18, wherein said transistor is of the type wherein its said current-sensitive resistance conducts in one direction only, and there being diode means connected across the last said resistance for conducting current in the opposite direction.

Claim 23

The intrinsic safety barrier combination of claim 14, including a first three-electrode transistor and a second three-electrode transistor, each having a self-bias circuit for causing it to appear to be a current-sensitive resistance between two of its electrodes, such current-sensitive resistances being connected together to define a current-limiting series resistance, and said series resistance being connected to said one electrode of said first zener diode for defining a third resistance.

Claim 24

The intrinsic safety barrier of claim 20, wherein at least one of said transistors is of the bipolar type, whereby its said current-sensitive resistance conducts in one direction only, and there being diode means connected across the last said resistance for conducting current in the opposite direction.

Claim 25

The intrinsic safety barrier combination of claim 14, including an FET having its gate and source interconnected for self-bias for having its drain to source resistance determined by the current therethrough and by said self-bias, said drain to source resistance being connected to said one electrode of said first zener diode for defining a third resistance.

Claim 26

The intrinsic safety barrier combination of claim 14, including a first FET and a second FET, the one having its source electrode connected to the drain electrode of the other, and one of the remaining drain and source electrodes being connected to said one electrode of said first zener diode for defining a third resistance as the drain to source resistances of said FET''s, in series; said gate and source of said first FET being interconnected by first self-bias means for having its drain to source resistance determined by the current therethrough and by said first self-bias means; and said gate and source of said second FET being interconnected by second self-bias means for having its drain to source resistance determined by the current therethrough and by said second self-bias means.

Claim 27

The intrinsic safety barrier combination of claim 14, wherein said first resistance and said first zener diode are incorporated in a monolithic structure wherein the noninterconnected end only of said first resistance and the other electrode only of said first zener diode are accessible externally of said structure, wherein said second resistance and said second zener diode are incorporated in a monolithic structure wherein the noninterconnected end only of said second resistance and the other electrode only of said second zener diode are accessible externally of the last said structure, and wherein said third zener diode is incorporated in a structure separate from the former said structures.

Claim 28

The intrinsic safety barrier combination of claim 24, wherein said high selector consists essentially of one diode interconnecting the said one electrode of said first zener diode and said third zener diode, and another diode interconnecting said one electrode of said second zener diode and said third zener diode, said one and another diodes being polarized so as to form an OR circuit with respect to the voltages at each said one electrode of said first and second zener diodes; said one diode being incorporated within said monolithic structure with said first zener diode, and said another diode being incorporated within said monolithic structure with said second zener diode.

Claim 29

The intrinsic safety barrier combination of claim 24, wherein the first said monolithic structure incorporates a third resistance and the second said monolithic structure incorporates a fourth resistance, one end of said third resistance being connected to said one electrode of said first zener diode, and one end of said fourth resistance being connected to said one electrode of said second zener diodes, the other ends only of said third and fourth resistances being accessible externally of said first and second said monolithic structures.

Claim 30

An intrinsic safety barrier comprising, in combination first and second terminals and terminal mEans, first and second current limiting resistances, and normally nonconductive shunt impedance, said first resistance having one end connected to said first terminal, said second resistance having one end connected to said second terminal, and said impedance having one end connected to said terminal means; the other ends of said resistances and said impedance being connected, each to the other, said first resistance being responsive to current of given value to blow out like a fuse; said second resistance being responsive to current of another given value to limit same to said another given value; said impedance being responsive to voltage at its said other end and corresponding to the first said current of the first said given value to become conductive between its said ends.

Claim 31

An intrinsic safety barrier comprising, in combination first and second terminals and terminal mEans, first and second current limiting resistances, and normally nonconductive shunt impedance, said first resistance having one end connected to said first terminal, said second resistance having one end connected to said second terminal, and said impedance having one end connected to said terminal means; the other ends of said resistances and said impedance being connected, each to the other, said first resistance being responsive to current of given value to blow out like a fuse; said second resistance being responsive to current of another given value to limit same to said another given value; said impedance being responsive to voltage at its said other end and corresponding to the first said current of the first said given value to become conductive between its said ends.

Claim 32

The intrinsic safety barrier of claim 27, wherein said first resistance is two further resistances interconnected in series, and said barrier also including a second normally nonconductive impedance like the first said impedance, said second impedance having one end connected to said terminal means and its other end connected to the interconnection of said further resistances.

Claim 33

The intrinsic safety barrier of claim 27, wherein said second resistance includes a self-biased transistor having three electrodes, such self-bias being that interelectrode resistance of said transistor functions as at least part of said second resistance.

Claim 34

The intrinsic safety barrier of claim 29, wherein said transistor is an FET, and said interelectrode resistance is the source to drain resistance thereof.

Claim 35

The intrinsic safety barrier of claim 29, wherein said transistor is bipolar, and said interelectrode resistance is the emitter-to-collector resistance thereof.

Claim 36

The intrinsic safety barrier of claim 29, wherein said second resistance also includes a second self-biased transistor like the first said transistor, the interelectrode resistances of said transistors being connected in series.

Claim 37

The intrinsic safety barrier of claim 32, wherein each said transistor is an FET, and said interelectrode resistances are the source to drain resistances of said FET''s.

Claim 38

The intrinsic safety barrier of claim 32, wherein each said transistor is bipolar, and said interelectrode resistances are the emitter to collector resistances of said transistors.

Claim 39

An intrinsic safety barrier combination, said combination including individual barriers for transmitting electrical energy applied thereto; an electrical energy selector connected to said individual barriers for selecting the one of said individual barriers transmitting the highest level electrical energy; and a master barrier connected to said selector for having said highest level electrical energy applied to said master barrier by said selector; each said barrier being responsive to level of electrical energy to transmit same only if last said level does not exceed a given value, and each said individual barriers being responsive, when selected by said selector, to said master barrier transmitting electrical energy, to cease transmitting electrical energy at a level above said given value.

Claim 40

An intrinsic safety barrier combination, said combination including individual barriers for transmitting electrical energy applied thereto; an electrical energy selector connected to said individual barriers for selecting the one of said individual barriers transmitting the highest level electrical energy; and a master barrier connected to said selector for having said highest level electrical energy applied to said master barrier by said selector; each said barrier being responsive to level of electrical energy to transmit same only if last said level does not exceed a given value, and each said individual barriers being responsive, when selected by said selector, to said master barrier transmitting electrical energy, to cease transmitting electrical energy at a level above said given value.

Claim 41

The intrinsic safety barrier combination of claim 35 wherein each said individual barrier includes an element traversed by the electrical energy being transmitted by the last said individual barrier, said element being responsive to electrical energy at a level exceeding said given value to blow out like a fuse, and said last said barrier being responsive, when selected by said selector, to cause the level of electrical energy traversing said elements to increase beyond said given value.