US3629664A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Solid-state timing module
Assignee: Allegheny Ludlum Corp
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Filing: 1970-11-12
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Granted: 1971-12-21
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Expires: 1990-11-12
Abstract
Abstract A solid-state timing module for direct current relay control systems characterized in that a combination of timing circuits are housed on a single pronged header and provided with means for interconnecting the circuits in various configurations to effect different timing modes and timing ranges. The module eliminates the necessity for stocking a wide variety of time delay relays and results in reduction of maintenance problems.
Inventors
- 👤 Peter A Lajoie
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 17:56
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/72; H03K17/73; H03K17/28; H03K5/00; H03K5/01; H03K5/04; H03K5/13
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
129 words
Timing circuitry for relay loads and the like, said circuitry being adapted to produce across a load energizing pulses in a predetermined timed sequence following actuation of an initiating switch and comprising at least three circuits incorporated into and forming an integral module, one of said circuits comprising a trigger section adapted to produce a spiked output pulse at a predetermined time following actuation of said initiating switch, a second of said circuits comprising a nonlatching switch, a third of said circuits comprising a latching switch, all of said circuits on the module being normally operationally disconnected one from the other, and terminals on said module for facilitating operational interconnection of said circuits and connection to an external initiating switch, a power supply and a least one load relay.
Claim 2
Dependent Claim
129 words
Timing circuitry for relay loads and the like, said circuitry being adapted to produce across a load energizing pulses in a predetermined timed sequence following actuation of an initiating switch and comprising at least three circuits incorporated into and forming an integral module, one of said circuits comprising a trigger section adapted to produce a spiked output pulse at a predetermined time following actuation of said initiating switch, a second of said circuits comprising a nonlatching switch, a third of said circuits comprising a latching switch, all of said circuits on the module being normally operationally disconnected one from the other, and terminals on said module for facilitating operational interconnection of said circuits and connection to an external initiating switch, a power supply and a least one load relay.
Claim 3
Dependent Claim
29 words
The timing circuitry of claim 1 wherein said module is provided with prongs electrically connected to said terminals for insertion into a plug to which external circuitry is connected.
Claim 4
Dependent Claim
40 words
The timing circuitry of claim 1 wherein said trigger section includes a capacitor, a breakover diode which will breakdown when the voltage across said capacitor exceeds a predetermined limit, and means including a field effect transistor for charging said capacitor.
Claim 5
Dependent Claim
87 words
The timing circuitry of claim 3 wherein said field effect transistor has a gate electrode connected to one of said terminals of the module, and including an external resistance-capacitance network, an external power supply, an an external initiating switch, said resistance-capacitance network being connected between said terminal to which said gate electrode is connected and said switch whereby upon closing of said switch the capacitor in said resistance-capacitance network will charge to control charging of said first-mentioned capacitor in the trigger section through said field effect transistor.
Claim 6
Dependent Claim
27 words
The timing circuitry of claim 1 wherein said nonlatching switch comprises a transistor having its emitter, collector and base each connected to a terminal on said module.
Claim 7
Dependent Claim
24 words
The timing circuitry of claim 5 wherein the emitter of said transistor is connected to an associated one of said terminals through a diode.
Claim 8
Dependent Claim
81 words
The timing circuitry of claim 1 wherein said nonlatching switch comprises a semiconductive controlled rectifier having its anode connected to a first of said terminals on the module and its cathode connected directly to a second of said terminals on the module, a diode connecting said cathode of the controlled rectifier to a third of said terminals on said module, and a control electrode for said controlled rectifier connected through a capacitor to a fourth of said terminals on said module.
Claim 9
Dependent Claim
30 words
The timing circuitry of claim 7 including a source of driving potential for said module, the negative terminal of said source of driving potential being connected to said third terminal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-12-20 | 1975-06-21 | 1975-12-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-12-20 | 1979-06-21 | 1979-12-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-12-20 | 1983-06-21 | 1983-12-21 | $7700.00 | Window Closed / Lapsed |