US3628161A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic sampling and hold circuit
Assignee: AT&T Inc
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Filing: 1970-03-12
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Granted: 1971-12-14
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Expires: 1990-03-12
Abstract
Abstract A sample and hold circuit is disclosed in which a gate is enabled to apply a wave sample to a delay line capacitor where the sample is momentarily stored. When the gate is disabled, the stored sample discharges with the line being effective to produce a relatively flat-topped output over a period of time following the disablement of the gate.
Inventors
- 👤 Ronald Lee Earp
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 02:21
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/04; H03K5/06; G; G11; G11C; G11C27/00; G11C27/02; G11C27/024
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
105 words
A sample and hold circuit comprising a set of input terminals, a set of output terminals, a constant-K, one-port ladder network having poles at both zero and infinite frequencies and, furthermore, having a capacitor as the element closest to the port, a load having an impedance value substantially equal to the driving-point impedance of said network and connected across said output terminals, means connecting said network port to said output terminals, and a sampling gate connected between said input terminals and the terminals of said capacitor closest to said network port to apply directly across said capacitor samples of waves applied to said input terminals.
Claim 2
Dependent Claim
105 words
A sample and hold circuit comprising a set of input terminals, a set of output terminals, a constant-K, one-port ladder network having poles at both zero and infinite frequencies and, furthermore, having a capacitor as the element closest to the port, a load having an impedance value substantially equal to the driving-point impedance of said network and connected across said output terminals, means connecting said network port to said output terminals, and a sampling gate connected between said input terminals and the terminals of said capacitor closest to said network port to apply directly across said capacitor samples of waves applied to said input terminals.
Claim 3
Dependent Claim
118 words
A sample and hold circuit comprising a set of input terminals, a set of output terminals, a constant-K, one-port ladder network comprising a plurality of high-pass, half-section, constant-K filters connected in series so that the capacitor of each filter is closer to the network port than the inductor of that filter, a load having an impedance value substantially equal to the driving-point impedance of said network and connected across said output terminals, means connecting said network port to said output terminals, and a sampling gate connected between said input terminals and the terminals of the capacitor of said filter closest to said network port to apply directly across that capacitor samples of waves applied to said input terminals.
Claim 4
Dependent Claim
118 words
A sample and hold circuit comprising a set of input terminals, a set of output terminals, a constant-K, one-port ladder network comprising a plurality of high-pass, half-section, constant-K filters connected in series so that the capacitor of each filter is closer to the network port than the inductor of that filter, a load having an impedance value substantially equal to the driving-point impedance of said network and connected across said output terminals, means connecting said network port to said output terminals, and a sampling gate connected between said input terminals and the terminals of the capacitor of said filter closest to said network port to apply directly across that capacitor samples of waves applied to said input terminals.
Claim 5
Dependent Claim
121 words
A sample and hold circuit comprising a set of input terminals, a set of output terminals, a constant-K, one-port ladder network formed of capacitors and inductors with said capacitors in series connection and said inductors in shunt connection in said network and having poles at both zero and infinite frequencies, a load having an impedance value substantially equal to the driving-point impedance of said network and connected across said output terminals, means connecting the port of said network to said output terminals, and a sampling gate connected between said input terminals and the terminals of the capacitor which is closest to the port of said network to apply directly across to that capacitor samples of waves applied to said input terminals.
Claim 6
Dependent Claim
121 words
A sample and hold circuit comprising a set of input terminals, a set of output terminals, a constant-K, one-port ladder network formed of capacitors and inductors with said capacitors in series connection and said inductors in shunt connection in said network and having poles at both zero and infinite frequencies, a load having an impedance value substantially equal to the driving-point impedance of said network and connected across said output terminals, means connecting the port of said network to said output terminals, and a sampling gate connected between said input terminals and the terminals of the capacitor which is closest to the port of said network to apply directly across to that capacitor samples of waves applied to said input terminals.
Claim 7
Dependent Claim
172 words
A sample and hold circuit comprising a set of input terminals, a set of output terminals, a constant-K, one-port ladder network having poles at both zero and infinite frequencies and, furthermore, having a driving-point impedance defined by the expression: where Z(s) is the Laplace transform of said driving-point impedance, C1, C2, . . Cn are the values in farads of the capacitors of said network beginning with the capacitor closest to the port of said network, L1, L2, . . Ln are the values in henries of the inductors of said network beginning with the inductor closest to said port, and s is the complex number used in Laplace transformations, a load having an impedance value substantially equal to said driving-point impedance and connected across said output terminals, means connecting the port of said network to said output terminals, and a sampling gate connected between said input terminals and the terminals of said capacitor closest to said port to apply directly across that capacitor samples of waves applied to said input terminals.
Claim 8
Dependent Claim
172 words
A sample and hold circuit comprising a set of input terminals, a set of output terminals, a constant-K, one-port ladder network having poles at both zero and infinite frequencies and, furthermore, having a driving-point impedance defined by the expression: where Z(s) is the Laplace transform of said driving-point impedance, C1, C2, . . Cn are the values in farads of the capacitors of said network beginning with the capacitor closest to the port of said network, L1, L2, . . Ln are the values in henries of the inductors of said network beginning with the inductor closest to said port, and s is the complex number used in Laplace transformations, a load having an impedance value substantially equal to said driving-point impedance and connected across said output terminals, means connecting the port of said network to said output terminals, and a sampling gate connected between said input terminals and the terminals of said capacitor closest to said port to apply directly across that capacitor samples of waves applied to said input terminals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-12-13 | 1975-06-14 | 1975-12-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-12-13 | 1979-06-14 | 1979-12-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-12-13 | 1983-06-14 | 1983-12-14 | $7700.00 | Window Closed / Lapsed |