Binary pulse train transmission systems

Claim 1

A system for the transmission of a first synchronous binary pulse train (C), comprising a transmitter (FIG. 1a), means in said transmitter for converting each bit of said first binary pulse train (C) into a pair of successive bits of a second pulse train (B) so that the bits of said first binary pulse train which have a first value (e.g. ''''1'''') correspond each to a pair (''''0 0,'''' ''''1 1'''') of equal bits having alternately said first and second bit value, and the bits of said first binary pulse train (C) which have the second value (''''0'''') correspond each to a predetermined one (e.g.''''01'''') of the two possible pairs (''''01,'''' ''''10'''') of unequal bits, a receiver (FIG. 2a), a transmIssion line (12) for transmission of said second pulse train (B) from said transmitter (FIG. 1) to said receiver (FIG. 2) and having a band pass characteristic, means (14, 16) in said receiver for dividing the received second pulse train (B) into pairs of successive bits, and means (14, 16, 19) for shifting the separation between two of these pairs of successive bits along one bit when at least one of these pairs of successive bits consists of the other (e.g. ''''1 0'''') of said two possible pairs of unequal bits, and means for converting (16, 18, 17) the pairs of bits into a pulse train corresponding to said first synchronous binary pulse train (C) by converting each pair (''''0 0,'''' ''''1 1'''') of equal bits to a bit having said first value (e.g. ''''1'''') and each pair of unequal bits (e.g. ''''0 1'''') to a bit having the second value (e.g. ''''0'''').

Claim 2

A system for the transmission of a first synchronous binary pulse train (C), comprising a transmitter (FIG. 1a), means in said transmitter for converting each bit of said first binary pulse train (C) into a pair of successive bits of a second pulse train (B) so that the bits of said first binary pulse train which have a first value (e.g. ''''1'''') correspond each to a pair (''''0 0,'''' ''''1 1'''') of equal bits having alternately said first and second bit value, and the bits of said first binary pulse train (C) which have the second value (''''0'''') correspond each to a predetermined one (e.g.''''01'''') of the two possible pairs (''''01,'''' ''''10'''') of unequal bits, a receiver (FIG. 2a), a transmIssion line (12) for transmission of said second pulse train (B) from said transmitter (FIG. 1) to said receiver (FIG. 2) and having a band pass characteristic, means (14, 16) in said receiver for dividing the received second pulse train (B) into pairs of successive bits, and means (14, 16, 19) for shifting the separation between two of these pairs of successive bits along one bit when at least one of these pairs of successive bits consists of the other (e.g. ''''1 0'''') of said two possible pairs of unequal bits, and means for converting (16, 18, 17) the pairs of bits into a pulse train corresponding to said first synchronous binary pulse train (C) by converting each pair (''''0 0,'''' ''''1 1'''') of equal bits to a bit having said first value (e.g. ''''1'''') and each pair of unequal bits (e.g. ''''0 1'''') to a bit having the second value (e.g. ''''0'''').

Claim 3

A system for the transmission of a first synchronous binary pulse train (C) and of additional service signals (Q) consisting each of one bit and spaced from each other by at least a predetermined number of bits of said first binary pulse train, comprising a transmitter (FIG. 4a) having an input (21) for said first binary pulse train (C) and a further input (31) for said service signals (Q), means (25, 26, 27, 23) in said transmitter for converting, if no service signal (Q) occurs, the bits of said first binary pulse train (C) each into a pair of successive bits of a second pulse train (B in FIG. 4b) so that the bits of said first binary pulse train which have a first value (e.g. ''''1'''') correspond each to a pair of equal bits (''''1 1,'''' ''''0 0''''), these pairs consisting alternately of bits of said first and a second bit value, and the bits of said first binary pulse train which have the second value (e.g. ''''0'''') correspond each to a predetermined one (e.g. ''''0 1'''') of the two possible pairs of unequal bits, and means (30, 38, 32, 25, 34, 35,) for converting, if a service signal occurs, three successive bits of said first binary pulse train into a group of three successive bit pairs of the second pulse train, one of these bit pairs of the second pulse train being the other (e.g. ''''1 0'''') of the two possible pairs of unequal bits and the remaining four bits of these three successive bit pairs being a bit combination assigned to the combination of said three successive bits of the first binary pulse train, a receiver (FIG. 5a) having an output (56) for a reproduction of the first binary pulse train (W, FIG. 5b) and a further output (55) for a reproduction of the service signals, a transmission line (22-42) for transmission of said second pulse train from said transmitter to said receiver and having a band pass characteristic, means (44,46) in said receiver for obtaining pairs of bits of the received second pulse train by dividing the received second pulse train into pairs of successive bits, and means (44,46,52) for shifting the pair forming separation along one bit, when two of the other (e.g. ''''1 0'''') of said possible pairs of unequal bits are spaced by a number of bit pairs smaller than said predetermined number of bits, means in said receiver connected to convert (46, 48, 47) the obtained pairs of bits into said reproduction of the first synchronous binary pulse train, if no other of the two possible pairs of unequal bits occurs, by converting each pair of equal bits to a bit having said first value (e.g. ''''1'''') and each pair of unequal bits to a bit having the second value (e.g. ''''0'''') and means (46, 49, 51) in said receiver connected to respond to said other (e.g. ''''1 0'''') of the two possible combinations of unequal bits and convert the combinations of four bits to the combinations of three successive bits assigned thereto and deliver a reproduction of the service signal oN said further output (55).

Claim 4

A system for the transmission of a first synchronous binary pulse train (C) and of additional service signals (Q) consisting each of one bit and spaced from each other by at least a predetermined number of bits of said first binary pulse train, comprising a transmitter (FIG. 4a) having an input (21) for said first binary pulse train (C) and a further input (31) for said service signals (Q), means (25, 26, 27, 23) in said transmitter for converting, if no service signal (Q) occurs, the bits of said first binary pulse train (C) each into a pair of successive bits of a second pulse train (B in FIG. 4b) so that the bits of said first binary pulse train which have a first value (e.g. ''''1'''') correspond each to a pair of equal bits (''''1 1,'''' ''''0 0''''), these pairs consisting alternately of bits of said first and a second bit value, and the bits of said first binary pulse train which have the second value (e.g. ''''0'''') correspond each to a predetermined one (e.g. ''''0 1'''') of the two possible pairs of unequal bits, and means (30, 38, 32, 25, 34, 35,) for converting, if a service signal occurs, three successive bits of said first binary pulse train into a group of three successive bit pairs of the second pulse train, one of these bit pairs of the second pulse train being the other (e.g. ''''1 0'''') of the two possible pairs of unequal bits and the remaining four bits of these three successive bit pairs being a bit combination assigned to the combination of said three successive bits of the first binary pulse train, a receiver (FIG. 5a) having an output (56) for a reproduction of the first binary pulse train (W, FIG. 5b) and a further output (55) for a reproduction of the service signals, a transmission line (22-42) for transmission of said second pulse train from said transmitter to said receiver and having a band pass characteristic, means (44,46) in said receiver for obtaining pairs of bits of the received second pulse train by dividing the received second pulse train into pairs of successive bits, and means (44,46,52) for shifting the pair forming separation along one bit, when two of the other (e.g. ''''1 0'''') of said possible pairs of unequal bits are spaced by a number of bit pairs smaller than said predetermined number of bits, means in said receiver connected to convert (46, 48, 47) the obtained pairs of bits into said reproduction of the first synchronous binary pulse train, if no other of the two possible pairs of unequal bits occurs, by converting each pair of equal bits to a bit having said first value (e.g. ''''1'''') and each pair of unequal bits to a bit having the second value (e.g. ''''0'''') and means (46, 49, 51) in said receiver connected to respond to said other (e.g. ''''1 0'''') of the two possible combinations of unequal bits and convert the combinations of four bits to the combinations of three successive bits assigned thereto and deliver a reproduction of the service signal oN said further output (55).