Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
189 words
In combination: a first phase-lock loop responsive to a first input signal for generating a first output signal having substantially the same frequency as said first input signal; a second phase-lock loop responsive to a second input signal for generating a second output signal having substantially the same frequency as said second input signal; integrator means having a short time constant circuit portion for providing said second loop with a fast signal response and a long time constant circuit portion for providing said second loop with a slow signal response when connected to said second loop, respectively; means responsive to said first output signal for generating a phase-lock signal capable of phase locking said second loop; means for generating an indicator signal, indicating phase lock of said first and second loops; and switch means for applying said phase-lock signal and connecting said short time constant circuit portion to said second loop until said second loop is phase locked, and for applying said second input signal and connecting said long time constant circuit portion to said second loop in response to said indicator signal when said loops are phase locked.
Claim 2
Dependent Claim
189 words
In combination: a first phase-lock loop responsive to a first input signal for generating a first output signal having substantially the same frequency as said first input signal; a second phase-lock loop responsive to a second input signal for generating a second output signal having substantially the same frequency as said second input signal; integrator means having a short time constant circuit portion for providing said second loop with a fast signal response and a long time constant circuit portion for providing said second loop with a slow signal response when connected to said second loop, respectively; means responsive to said first output signal for generating a phase-lock signal capable of phase locking said second loop; means for generating an indicator signal, indicating phase lock of said first and second loops; and switch means for applying said phase-lock signal and connecting said short time constant circuit portion to said second loop until said second loop is phase locked, and for applying said second input signal and connecting said long time constant circuit portion to said second loop in response to said indicator signal when said loops are phase locked.
Claim 3
Dependent Claim
32 words
The combination of claim 1 wherein said phase-lock signal-generating means comprises: frequency-divider means responsive to said first output signal for generating said phase-lock signal having the frequency of said second output signal.
Claim 4
Dependent Claim
74 words
The combination of claim 1 wherein said indicating signal generating means comprises: first lock-indicator means responsive to said first input and output signals for generating a signal indicating phase lock of said first loop; second lock-indicator means responsive to said second input and output signals for generating a signal indicating phase lock of said second loop; and AND-gate means responsive to said first and second loop phase-lock indicating signals for generating said indicator signal.
Claim 5
Dependent Claim
50 words
The combination of claim 1 wherein said phase-lock signal generating means comprises: frequency-multiplier means responsive to said second output signal for generating a signal having the frequency of said first output signal; and phase-detector means responsive to said first output signal and said frequency-multiplier signal for generating said phase-lock signal.
Claim 6
Dependent Claim
153 words
The combination of claim 1 wherein said indicating signal generating means comprises: first lock-indicator means responsive to said first input and output signals for generating a signal indicating phase lock of said first loop; second lock-indicator means responsive to said second input and output signals for generating a signal indicating phase lock of said second loop; means for multiplying said second output signal to provide a converted second output signal having the same frequency as said first output signal; third lock-indicator means responsive to said first output signal and said converted second output signal for generating a signal indicating phase lock of said second loop; OR gate means responsive to signals generated by either of said second and third lock-indicator means for generating a gating signal indicating phase lock of said second loop; and AND-gate means responsive to said first looP phase-lock indicating signal and said gating signal for generating said indicator signal.
Claim 7
Dependent Claim
100 words
The combination of claim 1 wherein said switch means comprises: a first switch for applying said phase-lock signal to said second loop until said second loop is phased locked, and for applying said second input signal to said second loop in response to said indicator signal when said loops are phase locked; and a second switch for connecting said short time constant circuit portion to said second loop until said second loop is phase locked and for connecting said long time constant circuit portion to said second loop in response to said indicator signal when said loops are phase locked.
Claim 8
Dependent Claim
100 words
The combination of claim 1 wherein said switch means comprises: a first switch for applying said phase-lock signal to said second loop until said second loop is phase locked, and for connecting said short time constant circuit portion to said second loop until said second loop is phase locked; and a second switch for applying said second input signal to said second loop in response to said indicator signal when said loops are phase locked, and for connecting said long time constant circuit portion to said second loop in response to said indicator signal when said loops are phase locked.