Data processing terminal unit

Claim 2

A real time, online data processing terminal unit operable via a communication channel coupling said terminal unit with a central data processing computer, said terminal unit compRising: keyboard means for manually entering both data and program information into the terminal unit; program loading means for automatically entering program information into the terminal unit; memory means adapted to receive and store data and program information from said keyboard means and to receive and store program information from said program loading means; printing means responsive to the data stored in said memory means and controllable by the program information stored in said memory means for selectively printing the data information according to the program information; logic means operatively coupling said printing means, said keyboard means and said program loading means with said memory means for controlling the flow of data and program information signals thereamong at a first frequency; means operatively controlled by said logic means for receiving data information from the central data processing computer via the communication channel at a second frequency; means operatively controlled by said logic means for transmitting data information to the central data processing computer via the communication channel at a second frequency; control means including a single bit pointer register for indicating transmit bit times and receive bit times for simultaneously transmitting data information to and receiving data information from the communication channel; and synchronizing means operatively connected to said receiving means and said transmitting means for synchronizing the communication rate of the communication channel with the processing rate of the terminal unit for effecting the transfer of data information by said receiving means and said transmitting means.

Claim 3

The real time, online data processing terminal according to claim 1 wherein the means for transmitting data information includes: a recirculating multiple-stage shift register for temporarily storing in binary encoded form and in bit-numerical sequence the data information to be transmitted; and transmit state control means to control the bit by bit flow of data information from said recirculating multiple-stage shift register as indicated by said bit pointer register to the communication channel. a recirculating multiple-stage shift register for temporarily storing each binary bit of data information in bit-numerical sequence as received from the communication channel; and receive state control means controlling the flow of each bit of data information from the communication channel to the recirculating multiple-stage shift register and position the received data bit in said stage according to the indication of said bit pointer register.

Claim 4

A full duplex real time, online data processing terminal unit operatively coupled via a communication channel to a central processor unit, said terminal unit comprising: a keyboard having an alpha section and a numeric section, said keyboard for entering data information and message format information; a plurality of supervisory control keys for generating single character messages; program information receiving means; memory means having a plurality of addressable sections for storing data information from said keyboard, single character message from said control keys and program information from said program information receiving means; printing means operatively coupled to said alpha keyboard and said numeric keyboard for visibly displaying the information entered on said alpha keyboard and on said numeric keyboard and operable to display information stored in said memory means; first register means operatively coupled to said memory means for receiving data information from or transferring data information to an individual one of said addressable sections of said memory means at a first data rate; second register means operatively coupled to said memory means for temporarily storing program information from said memory means; first cOntrol means operatively coupled to said second register means and responsive to said program information temporarily stored therein for controlling the transferring of data information from said memory means to said printing means; third register means operatively coupled to said first register means and responsive to said program information temporarily stored in said second register means for transferring data information between said first and third register means; receiver means electrically connected to the communication channel for serially receiving data information; fourth register means having a first and second portion, said second portion operatively coupled to said receiver means for receiving data information in bit serial form from said receiver means and temporarily storing said data information; fifth register means having a first and second portion, said second portion, operatively coupled to said second portion of said fourth register means and responsive to said receiver means for indicating which bit position in said second portion of said fourth register means contains data information and which bit position is available to receive data information from said receiver means, said fifth register means having a plurality of predetermined bit positions indicating information transfer conditions; second control means responsive to program information temporarily stored in said second register means for transferring data information between one of said portions of said fourth register means and said third register means at one of a plurality of said predetermined bit positions of said fifth register means; transmitter means operatively coupled to said fourth register means to serially transmit data information from said first portion of said fourth register means to said communication channel at a second frequency bandwidth according to the bit position indicated by said first portion of said fifth register means; and a timing synchronizer for synchronizing the flow of data information within said terminal unit between said first and second date rates of said communication channel and said memory means.

Claim 5

A full duplex real time, online data processing terminal unit operatively coupled via a communication channel to a central processor unit, said terminal unit comprising: a keyboard having an alpha section and a numeric section, said keyboard for entering data information and message format information; a plurality of supervisory control keys for generating single character messages; program information receiving means; memory means having a plurality of addressable sections for storing data information from said keyboard, single character message from said control keys and program information from said program information receiving means; printing means operatively coupled to said alpha keyboard and said numeric keyboard for visibly displaying the information entered on said alpha keyboard and on said numeric keyboard and operable to display information stored in said memory means; first register means operatively coupled to said memory means for receiving data information from or transferring data information to an individual one of said addressable sections of said memory means at a first data rate; second register means operatively coupled to said memory means for temporarily storing program information from said memory means; first cOntrol means operatively coupled to said second register means and responsive to said program information temporarily stored therein for controlling the transferring of data information from said memory means to said printing means; third register means operatively coupled to said first register means and responsive to said program information temporarily stored in said second register means for transferring data information between said first and third register means; receiver means electrically connected to the communication channel for serially receiving data information; fourth register means having a first and second portion, said second portion operatively coupled to said receiver means for receiving data information in bit serial form from said receiver means and temporarily storing said data information; fifth register means having a first and second portion, said second portion, operatively coupled to said second portion of said fourth register means and responsive to said receiver means for indicating which bit position in said second portion of said fourth register means contains data information and which bit position is available to receive data information from said receiver means, said fifth register means having a plurality of predetermined bit positions indicating information transfer conditions; second control means responsive to program information temporarily stored in said second register means for transferring data information between one of said portions of said fourth register means and said third register means at one of a plurality of said predetermined bit positions of said fifth register means; transmitter means operatively coupled to said fourth register means to serially transmit data information from said first portion of said fourth register means to said communication channel at a second frequency bandwidth according to the bit position indicated by said first portion of said fifth register means; and a timing synchronizer for synchronizing the flow of data information within said terminal unit between said first and second date rates of said communication channel and said memory means.

Claim 6

A full duplex real time, online data processing terminal unit according to claim 4 wherein each of said register means is a dynamic recirculating shift register adapted to store at least 64 binary encoded bits of data or program information.

Claim 7

A full duplex real time, online data processing terminal unit according to claim 5 wherein said first portion of said fourth and fifth register means each having a like number of bit positions and said second portion of said fourth and fifth register means each having a like number of bit positions, said first portion of each register operatively coupled together to control the serial bit flow of information to said transmitter means and said second portion of each register operatively coupled together to control the serial bit flow of information from said receiver means.

Claim 8

A full duplex real time online data processing terminal unit according to claim 6 wherein said fifth register means has a binary one in each bit position of said first portion for each data bit in the first portion of said fourth register means and said fifth register means has a binary zero in each bit position of said second portion for each data bit received in said second portion of said fourth register means.

Claim 9

A full duplex real time online data processing terminal unit according to claim 6 wherein said first and second portions of said fourth and fifth register means are equal and contain 32 bit positions.