US3625837A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electroplating solder-bump connectors on microcircuits
Assignee: Singer Co
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Filing: 1969-09-18
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Granted: 1971-12-07
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Expires: 1989-09-18
Abstract
Abstract A silicon wafer containing 100 to 300 microcircuits is coated with a patterned layer of glass and then a conducting layer of chromium and copper which connects, through openings in the glass, to circuit terminals and also to the silicon substrate at the scribe positions. A patterned photoresist then exposes only the terminal areas. An electroplating connection to the silicon substrate provides uniform, low-resistance current paths through the metallization at the scribe positions to the plating sites over the terminal positions for the electrodeposition of soldier.
Inventors
- 👤 Carl W Nelson
- 👤 John F Hinchey
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 12:57
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/01; H10W72/012; H10P; H10P14/00; H10P14/40; H10P14/46; H10P14/47; H10W20/00; H10W20/40; H10W72/019; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; H10W72/20; H10W72/251; H10W72/252; H10W72/29; H10W72/90; H10W72/921; H10W72/923; H10W72/931; H10W72/934; H10W72/951; H10W72/952
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
296 words
The steps in a method of forming bumps of solder on terminal areas of integrated circuit chips for mounting said chips on carrier modules and for connecting the circuits of said chips to conductors of said carrier modules, which steps comprise a. applying a glass coating to a silicon wafer having a plurality of circuits thereon distributed suitably for the fragmentation of said wafer into chips, each having a circuit and terminals, said glass coating covering said circuits and terminal areas, b. forming openings in the glass coating to expose said terminals, c. forming openings in said glass coating to expose areas of the silicon of said wafer at positions between the chips-to-be, d. depositing over said wafer a conducting layer of contact metal suitable for making adherent conductive connections to said terminals and to said silicon at said interchip areas, said metal layer covering said glass coating and forming electrically conductive bonds to said terminals and to the silicon exposed at said interchip areas, e. covering said layer of contact metal with a masking layer of electroplating resist and providing openings therein over said terminals for exposing said contact metal, f. applying an electric connection to the silicon of said wafer for thereby obtaining good electric conduction to said terminals of each chip through said silicon and through the bonds of said contact metal to the silicon at said interchip areas, g. utilizing said connection for electroplating solder onto the parts of said contact metal layer over said terminals so exposed through the openings in said resist, h. removing said resist and removing the then exposed, unplated parts of said contact metal layer, and i. heating the electroplated solder on said terminals to cause said solder to contract into a rounded bump on each terminal.
Claim 2
Dependent Claim
39 words
The method of claim 2 wherein said openings in said glass coating at said positions between the chips-to-be are formed by removing glass along substantially the lines along which the wafer is to be parted for forming separate chips.
Claim 3
Dependent Claim
24 words
The method of claim 2 wherein said terminals comprise a metal selected from the group consisting of aluminum, chromium, molybdenum, tungsten, copper or silver.
Claim 4
Dependent Claim
37 words
The method of claim 2 wherein said conducting layer is formed by first depositing a layer of chromium and then a layer of copper over said chromium with said copper having a thickness greater than said chromium.
Claim 5
Dependent Claim
26 words
The method of claim 2 wherein said solder comprises zero to five parts by weight of tin and 100 to 95 parts by weight of lead.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-12-06 | 1975-06-07 | 1975-12-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-12-06 | 1979-06-07 | 1979-12-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-12-06 | 1983-06-07 | 1983-12-07 | $7700.00 | Window Closed / Lapsed |