Abstract An output driver stage employs a pair of push-pull complementary transistor switches which are driven in phase, e.g., both off or both on. Two driving currents are provided to the output stage which currents are truly complementary, e.g., equal in phase with one sinking and the other sourcing. Reversed current flow is provided in one of the branches of the output stage by means of a ''''dummy'''' transistor stage and a constant current source, whereby the voltage output of the complementary transistor switches as seen between the collectors thereof will range from zero to double the possible breakdown voltage of each transistor switch. Thus the invention simulates a center tap transformer circuit, but further provides large bandwidth characteristics down to DC. The invention herein described was made in the course of a contract with the Department of United States Army.
A high-speed pulse driver circuit for providing a balanced current drive of selected voltage to a predetermined load in response to a given input signal, comprising the combination of; amplifier means including a first pair of complementary transistors operatively coupled to the given input signal to provide a pair of complementary driving currents of equal values; current-reversing means selectively coupled to one of the first pair of complementary transistors to reverse the direction of the respective driving current such that one is sinking and the other sourcing, to define truly complementary mirror image driving currents, and complementary push-pull output means selectively coupled to the other of said first pair of complementary transistors and to said current-reversing means for selectively introducing the sinking and sourcing complementary driving currents to said load as the balanced current drive.
Claim 2
Dependent Claim
135 words
A high-speed pulse driver circuit for providing a balanced current drive of selected voltage to a predetermined load in response to a given input signal, comprising the combination of; amplifier means including a first pair of complementary transistors operatively coupled to the given input signal to provide a pair of complementary driving currents of equal values; current-reversing means selectively coupled to one of the first pair of complementary transistors to reverse the direction of the respective driving current such that one is sinking and the other sourcing, to define truly complementary mirror image driving currents, and complementary push-pull output means selectively coupled to the other of said first pair of complementary transistors and to said current-reversing means for selectively introducing the sinking and sourcing complementary driving currents to said load as the balanced current drive.
Claim 3
Dependent Claim
32 words
The driver circuit of claim 1 wherein said current-reversing means includes a transistor operatively coupled between said push-pull output means and one of the complementary pair of transistors of the amplifier means.
Claim 4
Dependent Claim
105 words
The driver circuit of claim 2 wherein the push-pull output means includes; a second pair of complementary transistors whose outputs are respectively coupled to the load, and which are operatively coupled to respective complementary transistors of the amplifier means to provide a pair of branches for carrying said complementary driving currents; wherein the current-reversing transistor is operatively coupled within one branCh extending between associated transistors of said first and second pairs of complementary transistors to provide said reversed current direction in the branch; and constant current source means coupled to the junction between the current-reversing transistor and the associated transistor of the push-pull output means.
Claim 5
Dependent Claim
79 words
The driver circuit of claim 1 further comprising; a preamplifier stage coupled to the amplifier means input and having at least one input thereto to receive the given input signal; load charge means coupled to the load and adapted to deliver the complementary driving currents thereto in response to the transient periods of the given input signal; and load discharge means coupled to the load to rapidly discharge same during a selected time period of the given input signal.