US3623071A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Forced threshold ultra-high-speed analog to digital converter
Assignee: United States Department of the Navy
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Filing: 1970-08-24
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Granted: 1971-11-23
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Expires: 1990-08-24
Abstract
Abstract An analog to digital converter that provides conversion in real time at high bit rates and accuracy without the use of a digital to analog converter and successive comparisons or subtractions of reference voltages.
Inventors
- 👤 John M Bentlye
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 20:55
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/14; H03M1/16; H03M1/34; H03M1/36; H03M1/361
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
110 words
An analog to digital converter comprising: input means for receiving a wide band unknown analog signal to be converted into digital representation; first and second amplifiers connected to the input means; means for applying a forcing interrogate pulse to the first amplifier; a plurality of primary comparators for receiving the output of the first amplifier; a subtractor for receiving signals from the primary comparators and the second amplifier; a plurality of subprimary comparators connected to the subtractor; a primary decoder connected to the primary comparators; a subprimary decoder connected to the subprimary comparators; an adder for combining the outputs from the two decoders; and a digital output from the adder.
Claim 2
Dependent Claim
110 words
An analog to digital converter comprising: input means for receiving a wide band unknown analog signal to be converted into digital representation; first and second amplifiers connected to the input means; means for applying a forcing interrogate pulse to the first amplifier; a plurality of primary comparators for receiving the output of the first amplifier; a subtractor for receiving signals from the primary comparators and the second amplifier; a plurality of subprimary comparators connected to the subtractor; a primary decoder connected to the primary comparators; a subprimary decoder connected to the subprimary comparators; an adder for combining the outputs from the two decoders; and a digital output from the adder.
Claim 3
Dependent Claim
14 words
The device of claim 1 wherein the forcing interrogate pulse is a fast-rising pulse.
Claim 4
Dependent Claim
33 words
The device of claim 2 wherein each of the comparators has a reference voltage associated with it which differs in magnitude by one thirty-second of the full scale value of the input voltage.
Claim 5
Dependent Claim
26 words
The device of claim 3 wherein the primary comparators determine the particular threshold below which the unknown analog signal lies at a particular instant of time.
Claim 6
Dependent Claim
21 words
The device of claim 4 wherein the subprimary comparators determine how far below that particular threshold the unknown analog signal lies.
Claim 7
Dependent Claim
20 words
The device of claim 5 wherein the subtractor subtracts the unknown analog signal from the output of the primary comparators.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-11-22 | 1975-05-24 | 1975-11-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-11-22 | 1979-05-24 | 1979-11-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-11-22 | 1983-05-24 | 1983-11-23 | $7700.00 | Window Closed / Lapsed |