Cross-coupled bridge core memory addressing system

Claim 2

In a drive system for a magnetic core memory in which drive lines of a given set for at least one bit plane are grouped into 2N groups, each group having S lines, where N and S are integers, and the groups are associated in pairs, the combination comprising: a first plurality of diodes, D1, D3, etc., one for each of said 2N groups of lines, a given diode connected to all lines at a common end thereof of a given group and poled for conduction in said lines of current in a given direction; a second plurality of diodes, D2, D4, etc., one for each of said 2N groups of lines, a given diode connected to all lines at said common end of a given group, and poled for conduction of current in said lines in a direction opposite said given direction; a plurality of transistors, one for each of said 2N groups of lines, said transistors being associated in pairs by having an emitter of a given transistor connected in series with one of said first plurality of diodes and one of said groups of lines, and a collector of said given transistor connected in series with one of said second plurality of diodes and a different one of said groups of lines, whereby the collector of a given transistor of a pair of transistors is coupled to a unique one of two paired groups of lines; means for switching a selected one of said transistors on; means for selectively applying a voltage of a given polarity to emitters of all of said plurality of transistors to forward bias one of said second plurality of diodes when said selected transistor is switched on for current flow in a chosen line in a given direction; means for selectively applying a voltage of a polarity opposite said given polarity to collectors of all transistors to forward bias one of said first plurality of diodes when said selected transistor is switched on for current flow in a chosen line in a direction opposite said given direction; a plurality of selectively activated bipolar current sources, one source for each of S lines of a given group connected to corresponding lines of all groups at ends thereof opposite said common end; and means for selectively activating a bipolar current source connected to said given line for current flow in the direction desired.

Claim 3

The combination of claim 1 wherein said means for applying a voltage of a given polarity to emitters of all transistors, and said means for selectively applying a voltage of a polarity of opposite said given polarity to collectors of all transistors comprises a bipolar voltage source having an output terminal connected to said collector and said emitter of each of said plurality of transistors through separate buffer diodes poled for forward conduction through the transistor to which connected when that transistor is selectively switched on.

Claim 4

The combination of claim 1 wherein said means for applying a voltage of a given polarity to emitters of all transistors, and said means for selectively applying a voltage of a polarity of opposite said given polarity to collectors of all transistors comprises first and second current sources of opposite polarity, said first source being connected to said collector of each of said plurality of transistors through separate buffer diodes poled for forward conduction when said first source source is selectively activated, and said second source being connected to said emitters of said emitters of each of said plurality of transistors through separate buffer diodes poled for forward conduction when said second source is selectively activated, and means for selectively activating one of said first and second sources.

Claim 5

In a drive system for a magnetic core memory in which drive lines of a given set for at least one bit plane are grouped into 2N groups, each group having S lines, where N and S are integers, and the groups are associated in pairs, the combination comprising: a pair of transistor switches for each of N pair of said groups of drive lines, each switch comprising a transistor of a given conductivity type having a collector, an emitter, a base, and means for forward biasing the base-emitter junction thereof when the transistor switch is to be activated; a first diode coupling said emitter of a first one of saiD transistors of a given pair of transistor switches to a common end of all lines of a first group of lines of a given associated pair of groups, and a second diode coupling said collector of a second one of said transistors of said given pair of transistor switches to said common end of all lines of said first group of lines of said given associated pair of groups, said first and second diodes being poled for forward conduction through said first and second transistors, respectively; a third diode coupling said emitter of said one of said transistors of said given pair of transistor switches to a common end of all lines of a second group of lines of said given associated pair of groups, and a fourth diode coupling said collector of said first one of said transistor of said given pair of transistor switches to said common end of all lines of said second group of lines of said given associated pair of groups, said third and fourth diodes being poled for forward conduction through said second and first transistors, respectively; means for selectively and alternatively applying a voltage of a given polarity to collectors of all transistors of said transistor switches and a voltage of a polarity opposite said given polarity to emitters of all transistors of said transistor switches, depending upon the direction of current flow desired through a given line; means for selectively activating said forward biasing means of a particular transistor of a pair of transistor switches coupled to a particular pair of groups of lines which includes said given line, depending upon both the direction of current flow desired and the particular group that includes said given line through which current is to flow; a plurality of selectively activated bipolar current sources, one source for each of S lines of a given group connected to corresponding lines of all groups at ends thereof opposite said common end; and means for selectively activating a bipolar current source connected to said given line for current flow in the direction desired.

Claim 6

In a drive system for a magnetic core memory in which drive lines of a given set for at least one bit plane are grouped into 2N groups, each group having S lines, where N and S are integers, and the groups are associated in pairs, the combination comprising: a pair of transistor switches for each of N pair of said groups of drive lines, each switch comprising a transistor of a given conductivity type having a collector, an emitter, a base, and means for forward biasing the base-emitter junction thereof when the transistor switch is to be activated; a first diode coupling said emitter of a first one of saiD transistors of a given pair of transistor switches to a common end of all lines of a first group of lines of a given associated pair of groups, and a second diode coupling said collector of a second one of said transistors of said given pair of transistor switches to said common end of all lines of said first group of lines of said given associated pair of groups, said first and second diodes being poled for forward conduction through said first and second transistors, respectively; a third diode coupling said emitter of said one of said transistors of said given pair of transistor switches to a common end of all lines of a second group of lines of said given associated pair of groups, and a fourth diode coupling said collector of said first one of said transistor of said given pair of transistor switches to said common end of all lines of said second group of lines of said given associated pair of groups, said third and fourth diodes being poled for forward conduction through said second and first transistors, respectively; means for selectively and alternatively applying a voltage of a given polarity to collectors of all transistors of said transistor switches and a voltage of a polarity opposite said given polarity to emitters of all transistors of said transistor switches, depending upon the direction of current flow desired through a given line; means for selectively activating said forward biasing means of a particular transistor of a pair of transistor switches coupled to a particular pair of groups of lines which includes said given line, depending upon both the direction of current flow desired and the particular group that includes said given line through which current is to flow; a plurality of selectively activated bipolar current sources, one source for each of S lines of a given group connected to corresponding lines of all groups at ends thereof opposite said common end; and means for selectively activating a bipolar current source connected to said given line for current flow in the direction desired.

Claim 7

The combination of claim 4 wherein said means for selectively and alternatively applying a voltage of a given polarity to collectors of all transistors of said transistor switches and a voltage of a polarity opposite said given polarity to emitters of all transistors of said transistor switches comprises a bipolar voltage source having an output terminal connected to said collectors and emitters through separate buffer diodes, a given buffer diode being poled for forward conduction through the transistor to which connected when that transistor is selectively turned on, while the other buffer diode connected to the same transistor is back biased.

Claim 8

The combination of claim 4 wherein said means for selectively and alternatively applying a voltage of a given polarity to collectors of all transistors of said transistor switches and a voltage of a polarity opposite said given polarity to emitters of all transistors of said transistor switches comprises first and second current sources of opposite polarity, said first source being connected to said collector of each transistor of said transistor switches through separate buffer diodes poled for forward conduction through said transistors when said first source is selectively activated, and said second source being connected to said emitter of each transistor of said transistor switches through separate buffer diodes poled for forward conduction through said transistors when said second source id selectively activated, and means for selectively activating one of said first and second sources.

Claim 9

In a drive system for a magnetic core memory in which at least two drive lines are to be selectively driven with current in one direction for a read cycle and in the opposite direction for a write cycle, the combination of: a pair of transistor switches comprising respective first and second transistors of like conductivity type, each having an emitter, a collector, a base, and meaNs for forward biasing the base-emitter junctions thereof selectively; first and second diodes connecting the emitter and collector of said first and second transistors, respectively, to one of said two drive lines, said first diode being poled for conduction of current through said one of said two drive lines in the same direction as current through said base-emitter junction of said first transistor, and said second diode being poled for conduction of current through said one of said two drive lines in the opposite direction as current through said one diode; third and fourth diodes connecting the emitter and collector of said second and third transistors, respectively, to the other of said two drive lines, said third diode being poled for conduction of current through said other drive line in the same direction as current through said base-emitter junction of said second transistor connected to said other drive line, and said fourth diode being poled for conduction of current in the opposite direction as current through said other diode; first and second distribution lines; fifth and sixth diodes connected between said first distribution line and collector electrodes of said first and second transistors, respectively, said fifth and sixth diodes being poled for forward conduction of currents through said first and third diodes, respectively; seventh and eighth diodes connected between said second distribution line and emitter electrodes of said first and second transistors, respectively, said seventh and eighth diodes being poled for forward conduction of currents through said second and fourth diodes, respectively; means for selectively producing a potential on a least said first distribution line of a given polarity to forward bias said fifth and sixth diodes for current through a drive line in a given direction, and selectively producing a potential on at least said second distribution line of a polarity opposite said given polarity for current through a drive line in a direction opposite said given direction; and line addressing means for selectively actuating said means for forward biasing the base-emitter junction of one of said transistors depending upon both the line through which drive current is desired and the direction of drive current desired.

Claim 10

In a drive system for a magnetic core memory in which at least two drive lines are to be selectively driven with current in one direction for a read cycle and in the opposite direction for a write cycle, the combination of: a pair of transistor switches comprising respective first and second transistors of like conductivity type, each having an emitter, a collector, a base, and meaNs for forward biasing the base-emitter junctions thereof selectively; first and second diodes connecting the emitter and collector of said first and second transistors, respectively, to one of said two drive lines, said first diode being poled for conduction of current through said one of said two drive lines in the same direction as current through said base-emitter junction of said first transistor, and said second diode being poled for conduction of current through said one of said two drive lines in the opposite direction as current through said one diode; third and fourth diodes connecting the emitter and collector of said second and third transistors, respectively, to the other of said two drive lines, said third diode being poled for conduction of current through said other drive line in the same direction as current through said base-emitter junction of said second transistor connected to said other drive line, and said fourth diode being poled for conduction of current in the opposite direction as current through said other diode; first and second distribution lines; fifth and sixth diodes connected between said first distribution line and collector electrodes of said first and second transistors, respectively, said fifth and sixth diodes being poled for forward conduction of currents through said first and third diodes, respectively; seventh and eighth diodes connected between said second distribution line and emitter electrodes of said first and second transistors, respectively, said seventh and eighth diodes being poled for forward conduction of currents through said second and fourth diodes, respectively; means for selectively producing a potential on a least said first distribution line of a given polarity to forward bias said fifth and sixth diodes for current through a drive line in a given direction, and selectively producing a potential on at least said second distribution line of a polarity opposite said given polarity for current through a drive line in a direction opposite said given direction; and line addressing means for selectively actuating said means for forward biasing the base-emitter junction of one of said transistors depending upon both the line through which drive current is desired and the direction of drive current desired.

Claim 11

The combination of claim 7 wherein said first and second distribution lines are connected to a junction and said selective potential-producing means comprises a bipolar voltage means connected to said junction for producing a potential on said first and second distribution lines simultaneously of a polarity dependent upon the direction of current flow desired through a line selected by said line addressing means.

Claim 12

The combination of claim 7 wherein only one of said first and second distribution lines is energized by said selective potential-producing means at any given time.

Claim 13

The combination of claim 9 including first and second shunt switches connected between circuit ground and said first and second distribution lines, respectively, and means for holding each of said shunt switches in a conducting state, and for switching each one to its nonconductive state while the distribution line to which connected is being selectively energized.