US3622916A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Periodic frequency characteristic filter for filtering periodic sampled signal
Assignee: Telefonaktiebolaget LM Ericsson AB
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Filing: 1970-02-24
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Granted: 1971-11-23
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Expires: 1990-02-24
Abstract
Abstract A filter has first and second multiinput addition circuits each with a single output wherein one input of the first addition is the input to the filter and the output of the second addition circuit is the output of the filter. The addition circuits are so constructed that the signal received at any input is multiplied by a weighting factor. The output of the first addition circuit is connected to one input of the second addition circuit. A plurality of serially connected delay circuits are also connected between the outlet of the first addition circuit and the inputs of the second addition circuit with the outputs of the delay circuits being connected to respective inputs of the second addition circuit and also to respective inputs of the first addition circuit. The delay of the delay circuits is equal to 1/N times the sampling period, where N is an integer greater than unity so that different transfer functions of the filter can be obtained.
Inventors
- 👤 Tore Torstensson Fjallbrant
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 05:31
CPC Classifications
H; H03; H03H; H03H17/00; H03H17/02; H03H17/04
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
221 words
Filter, intended for filtering of a sampled signal, consisting of a first and a second addition circuit (S1 and S2 respectively) each having an outlet (V1 and V2 respectively) and a number of inlets (B0, B1, B2......and A0, A1, A2......respectively) and so constructed that at the respective outlet is obtained the sum of the input signals multiplied by a factor (b1, b2......and a0, a1, a2 respectively) associated with each inlet, one inlet (B0) of the first addition circuit constituting the inlet of the filter and the outlet of the second addition circuit constitute its outlet, and the outlet of the first addition circuit being connected both to an inlet (A0) of the second addition circuit and to the inlet of the first of a number of series-connected delay circuits (D1, D2.....), the outlets of which are connected each to an inlet of the first and an inlet of the second addition circuit (B1, A1.....and B2, A2......respectively), characterized in that the delay of the delay circuits is equal to 1/N times the sampling period, where N is an integer greater than 1, whereby it is achieved that every input signal gives rise to an output signal at N points of time during the sampling period, and that, for each of these output signals, different transfer functions of the filter can be obtained.
Claim 2
Dependent Claim
221 words
Filter, intended for filtering of a sampled signal, consisting of a first and a second addition circuit (S1 and S2 respectively) each having an outlet (V1 and V2 respectively) and a number of inlets (B0, B1, B2......and A0, A1, A2......respectively) and so constructed that at the respective outlet is obtained the sum of the input signals multiplied by a factor (b1, b2......and a0, a1, a2 respectively) associated with each inlet, one inlet (B0) of the first addition circuit constituting the inlet of the filter and the outlet of the second addition circuit constitute its outlet, and the outlet of the first addition circuit being connected both to an inlet (A0) of the second addition circuit and to the inlet of the first of a number of series-connected delay circuits (D1, D2.....), the outlets of which are connected each to an inlet of the first and an inlet of the second addition circuit (B1, A1.....and B2, A2......respectively), characterized in that the delay of the delay circuits is equal to 1/N times the sampling period, where N is an integer greater than 1, whereby it is achieved that every input signal gives rise to an output signal at N points of time during the sampling period, and that, for each of these output signals, different transfer functions of the filter can be obtained.
Claim 3
Dependent Claim
115 words
Filter according to claim 1, intended for filtering of a signal sampled with periodically varying pulse intervals, characterized in that the multiplying factors (b1, b2....) of the first addition circuit (S1) vary in dependence of the length (t) of the pulse interval between the pulses, so that bt is constant from one pulse interval to another, b being the value of multiplying factor and t being the time between two pulses in a pulse interval, and that at the outlet side of the second addition circuit (S2) there is a gate circuit (G) arranged to pass output signals in synchronism with the feeding of the pulses to the inlet of the first addition circuit (S1).
Claim 4
Dependent Claim
23 words
Filter according to claim 1, characterized in that the said factors are preset to different values at the said N points of time.
Claim 5
Dependent Claim
231 words
Filter according to claim 3, for filtering a signal sampled with the period T, characterized in that the number of delay circuits is two, N2, the multiplication factor (a0) of the inlet of the second addition circuit, which is connected to the outlet of the first addition circuit, is 1, the multiplication factor (a1) of the inlet of the second addition circuit, which is connected to the outlet of the first delay circuit, is 1, the multiplication factor (b1) of the inlet of the first addition circuit, which is connected to the outlet of the first delay circuit, at the sampling times, is 1 and at points of time which occur at time T/2 after these times has a value which may be varied between 0 and 2, and that the multiplication factor (a2) of the inlet of the second addition circuit, which is connected to the outlet of the second delay circuit, is 1, and the multiplication factor (b2) of the inlet of the first addition circuit, which is connected to the outlet of the second delay circuit, is 1+ Delta at the sampling times and 1 at the points of time which occur time T/2 after these times, whereby a band-stop filter is obtained the cutoff frequency of which is determined by said variable value and the width of the stop band is determined by the number Delta .
Claim 6
Dependent Claim
220 words
Filter according to claim 3, characterized in that the number of delay circuits is two, N2, the multiplication factor (a0) of the inlet of the second addition circuit, which is connected to the outlet of the first addition circuit, is 1, the multiplication factor (a1) of the inlet of the second addition circuit, which is connected to the outlet of the first delay circuit, is 1, the multiplication factor (b1) of the inlet of the first addition circuit, which is connected to the outlet of the first delay circuit at the sampling times, is 1 and at points of time which occur at T/2 after these times has a value which may be varied between 0 and -2, AND that the multiplication factor (a2) of the inlet of the second addition circuit, which is connected to the outlet of the second delay circuit is 1, and the multiplication factor (b2) of the inlet of the first addition circuit, which is connected to the outlet of the second delay circuit, is 1 at the sampling times and 1 at the points of time which occur time T/2 after these times, whereby a band-stop filter is obtained, the cutoff frequency of which is determined by said variable value and the width of the stop band is determined by the number Delta .
References Cited (Backward Citations)
US3370292A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-11-22 | 1975-05-24 | 1975-11-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-11-22 | 1979-05-24 | 1979-11-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-11-22 | 1983-05-24 | 1983-11-23 | $7700.00 | Window Closed / Lapsed |