Current limiting switching circuit

Claim 2

A switching circuit comprising: a semiconductor device including first and second terminals defining a controllable current path therebetween, and a control terminal for controlling the current flow therethrough; circuit means for connecting said first terminal to a load circuit; circuit means for applying a constant bias signal to said control terminal; switching means responsive to a control signal for providing a circuit that is switched between high and low impedance states; resistive means, and circuit means connecting said resistive means in a series circuit between said second terminal and said switching means so that for a first range of current through said resistive means said device is saturated when said switching means is in said low-impedance state and is cut off when said switching circuit is in said high-impedance state, and for a second range of current through said resistive means, greater than said first range, said resistive means generates a signal that offsets said constant bias signal wherein said device functions as a substantially constant current source providing a present level of current and said device is conductive at said present level when said switching circuit is in said low-impedance state and is cut off when said switching circuit is in said high-impedance state.

Claim 3

A switching circuit comprising: first and second transistors; resistive means; circuit means connecting said first and second transistors in a series circuit, with said resistive means connected between the collector of said first transistor and the emitter of said second transistor; circuit means for connecting said second transistor collector to an output circuit; biasing circuit means for applying a substantially constant bias potential to the base of said second transistor, and switching circuit means coupled to the base of said first transistor for switching said first and second transistor between conductive and nonconductive states.

Claim 4

A switching circuit comprising: first and second transistors; resistive means; circuit means connecting said first and second transistors in a series circuit, with said resistive means connected between the collector of said first transistor and the emitter of said second transistor; circuit means for connecting said second transistor collector to an output circuit; biasing circuit means for applying a substantially constant bias potential to the base of said second transistor, and switching circuit means coupled to the base of said first transistor for switching said first and second transistor between conductive and nonconductive states.

Claim 5

A switching circuit as defined in claim 2 including: a third transistor; circuit means connecting said third transistor between the collector of said second transistor and ground, and circuit means connecting the base of said third transistor to said switching means so that said third transistor is rendered conductive when said first and second transistors are rendered nonconductive, and vice versa.

Claim 6

A switching circuit as defined in claim 2 wherein said biasing circuit means includes a plurality of diodes in series with a second resistive means connected to apply a substantially constant reference potential to the base of said second transistor.

Claim 7

A switching circuit as defined in claim 4 wherein said switching means switches said first transistor between cut off and saturated states of operation.

Claim 8

A switching circuit as defined in claim 5 including third resistive means connected between said output circuit and the emitter of said second transistor.

Claim 9

A switching circuit comprising: first and second power terminals for connection to a unidirectional source of energizing potential; first and second semiconductor devices, each including first and second terminals defining a controllable current path therebetween and a control terminal for controlling the current flow therethrough; an output terminal for connection to a load circuit connected to said first power terminal; switching circuit means connected to the control terminal of said first semiconductor device for switching said first device between saturated and nonconductive states; biasing means connected to the control terminal of said second semiconductor device for applying a substantially constant biasing control potential thereto; circuit means connecting the first and second terminals of said first and second semiconductor devices in a series circuit between said second power terminal and said output terminal so that second device is conductive when said first device is conductive; resistive means, and circuit means connecting said resistive means in said series circuit between said first and second devices so that a current flow through said series circuit develops a potential across said resistive means having a polarity to counteract the biasing potential applied to said second device, the arrangement being such that for a first range of current through said resistive means said second device is switched between a saturated state and cut off, and for a second range of current through said resistive means, greater than said first range, the potential drop across said resistive means reduces the conductivity of said second device to provide a substantially constant current switching circuit.

Claim 10

A switching circuit comprising: first and second power terminals for connection to a unidirectional source of energizing potential; first and second semiconductor devices, each including first and second terminals defining a controllable current path therebetween and a control terminal for controlling the current flow therethrough; an output terminal for connection to a load circuit connected to said first power terminal; switching circuit means connected to the control terminal of said first semiconductor device for switching said first device between saturated and nonconductive states; biasing means connected to the control terminal of said second semiconductor device for applying a substantially constant biasing control potential thereto; circuit means connecting the first and second terminals of said first and second semiconductor devices in a series circuit between said second power terminal and said output terminal so that second device is conductive when said first device is conductive; resistive means, and circuit means connecting said resistive means in said series circuit between said first and second devices so that a current flow through said series circuit develops a potential across said resistive means having a polarity to counteract the biasing potential applied to said second device, the arrangement being such that for a first range of current through said resistive means said second device is switched between a saturated state and cut off, and for a second range of current through said resistive means, greater than said first range, the potential drop across said resistive means reduces the conductivity of said second device to provide a substantially constant current switching circuit.

Claim 11

A switching circuit as defined in claim 7 including: a third semiconductor device having first and second terminals defining a controllable current path therebetween and a control terminal for controlling the current flow therethrough; circuit means connecting the first and second terminal of said third device between said output terminal and said first power terminal, and circuit means connecting the control terminal of said third device to said switching means so that said third device is rendered conductive when said first device is cut off.

Claim 12

A switching circuit as defined in claim 8 wherein said biasing circuit means includes second resistive means connected in series with a plurality of diodes between said first power terminal and the connection of said other resistive means with said first device, and circuit means connecting said second resistive means to the control terminal of said second device.

Claim 13

A switching circuit as defined in claim 9 including third resistive means connected across the first and second terminals of said second device.